When a company develops chip for the military industry, I would prefer these chips to be using a 100% reliable technology. I am sure that you too! For certain application, 99%, or even 99.99% rate of confidence is not enough. Would you accept to fly in an airplane if you still have 1 out of 10,000 chances to crash? Would you accept living… Read More
Author: Eric Esteve
New MIPI protocols: Unipro, LLI and CSI3 over MPHY.
New MIPI protocols: Unipro, LLI and CSI3 over MPHY.
Gabriele ZARRI, Moshik RUBIN, Cadence
Sophia Antipolis, France SAME 2012 Conference – October 2 & 3, 2012 2
Abstract:
With more than 50% of the world‟s population using cellular phones and the growing number of devices that go mobile, from game consoles and media player… Read More
So British! with Mike MULLER (ARM CTO & Founder) at SAME Conference
SAME conference has started with Joel Huloux, Chairman of the MIPI Alliance, who gave a high level introduction about MIPI, rather business than technology oriented, talking to Marketing/Management audience. Extracting the main points from his presentation:
- More than 30 specifications have been issued (Important remark:
Samsung going vertical Qualcomm cry CEVA laugh
These last days have been full of Apple related stories; maybe it’s time to discuss a new topic? Like for example Samsung, direct competitor for Apple in the smartphone market, and take a look at the company move toward more vertical integration. Everybody working in the SC industry knows that Samsung is ranked #2 behind Intel, even… Read More
SAME 2012 Conference on October 2-3 in Sophia is coming soon!
This is the 15[SUP]th[/SUP] anniversary for the SAME Conference, dedicated to innovation on Microelectronics. Sophia-Antipolis is not only close to Mediterranean sea, but also at the heart of Telecom valley in south of France, with Texas Instruments design center dedicated to Application Processor design (OMAP), Cadence… Read More
Virtual Prototype your SoC including Arteris FlexNoC and optimize architecture using CPAK from Carbon
I have talked about Virtual Prototyping a SoC including FlexNoC Network on Chip IP from Arteris by using Carbon Design Systems set of tools in a previous post. A blog, posted on Carbon’ web, is clearly explaining the process to follow to optimize a fabric (FlexNoC) successively using the different tools from Carbon. Bill Neifert,… Read More
High Speed PHY Interfacing with SSIC, UFS or PCI express in Smartphone, Media tablet and Ultrabook at Lower Power
We have recently commented the announcement from MIPI Alliance and PCI-SIG, allowing PCI Express to be used in martphone, Media tablet and Ultrabook, while keeping decent power consumption, compatible with these mobile devices. The secret sauce is in the High Speed SerDes function selected to interface with these high data … Read More
PCI express WILL be used in Smartphone and Media Tablet… opening infinity of new opportunities
Looking at the various Interface protocols like HDMI, SuperSpeed USB, Universal Flash Storage (UFS) or even SATA integrated in Application Processor for smartphone and media tablet, one extremely powerful Interface protocol, already in use in electronic systems from various market segments from PC, PC Peripherals, Networking,… Read More
Cadence September News: strong IP and VIP focus
There are three articles on the front page, in the September release of Cadence newsletter, all of them are dedicated to either IP (DDR4), VIP (NVM express VIP being used at Samsung) or Martin Lund. You can read Martin’s interview here and/or take a look at what I write about him this summer. This strong focus on IP, and in fact on Interface… Read More
Interface IP (USB, PCIe, SATA, HDMI, MIPI, DDRn,…) Survey : the Introduction
The need to exchange larger and larger amount of data from system to the external world, or internally into an application, has pushed for the standardization of interconnect protocol. This allows interconnecting different Integrated Circuits (IC) coming from different vendors. Some protocols have been defined to best fit… Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside