The Universal Chiplet Interconnect Express (UCIe) 3.0 specification marks a decisive step in the industry’s shift from monolithic SoCs to modular, multi-die systems. Released on August 5, 2025, the new standard doubles peak link speed from 32 GT/s in UCIe 2.0 to 48 and 64 GT/s while adding a suite of manageability and efficiency
Author: Daniel Nenni
UCIe 3.0: Doubling Bandwidth and Deepening Manageability for the Chiplet Era
CEO Interview with Dr. Avi Madisetti of Mixed-Signal Devices
Avi Madisetti is the CEO and Founder of Mixed-Signal Devices, a fabless semiconductor company delivering multi-gigahertz timing solutions. A veteran of Broadcom and Rockwell Semiconductor, Avi helped pioneer DSP-based Ethernet and SerDes architectures that have shipped in the billions. He later co-founded Mobius Semiconductor,… Read More
Materials Selection Methodology White Paper
The Granta EduPack White Paper on Materials Selection, authored by Harriet Parnell, Kaitlin Tyler, and Mike Ashby, presents a practical and educational guide to selecting materials in engineering design. Developed by Ansys and based on Ashby’s well-known methodologies, the paper outlines a four-step process to help learners… Read More
Formal Verification: Why It Matters for Post-Quantum Cryptography
Formal verification is becoming essential in the design and implementation of cryptographic systems, particularly as the industry prepares for post-quantum cryptography (PQC). While traditional testing techniques validate correctness over a finite set of scenarios, formal verification uses mathematical proofs to guarantee… Read More
CEO Interview with Bob Fung of Owens Design
Bob Fung is the CEO of Owens Design, a Silicon Valley company specializing in the design and build of complex equipment that powers high-tech manufacturing. Over his 22-year tenure, Bob has led the development of more than 200 custom systems for world-class companies across the semiconductor, biomedical, energy, and emerging… Read More
Architecting Your Next SoC: Join the Live Discussion on Tradeoffs, IP, and Ecosystem Realities
Designing a system-on-chip (SoC) has never been more complex—or more critical. With accelerating demands across AI, automotive, and high-performance compute applications, today’s SoC architects face a series of high-stakes tradeoffs from the very beginning. Decisions made during the earliest phases of design—regarding… Read More
CEO Interview with Andrew Skafel of Edgewater Wireless
As the demand for high-capacity, low-latency wireless networks explodes across residential, enterprise, and industrial environments, a Canadian innovator is quietly reshaping the way Wi-Fi works—from the silicon up. Edgewater Wireless (TSXV:YFI/OTC:KPIFF), headquartered in Ottawa, is pioneering a transformative… Read More
Why I Think Intel 3.0 Will Succeed
Probably one of the most anticipated semiconductor investor calls was held last week and it did not disappoint. It was Lip-Bu Tan’s first full quarter since he took over as CEO. In the resulting discussions on the SemiWiki Forum I am viewed as overly optimistic of Intel’s recent pivot. That is true, I am optimistic, but my observations… Read More
CEO Interview with Jutta Meier of IQE
Jutta Meier is an experienced executive who has held senior positions at global semiconductor companies for over 25 years. She joined IQE in January 2024 as CFO, and was announced as IQE’s CEO in May of 2025. She joined IQE after serving at Intel Corporation as a Senior Finance Director at Intel Foundry Services, supporting Intel’s… Read More
Executive Interview with Ryan W. Parker of Phononic Inc.
Ryan W. Parker is a seasoned executive and product leader at Phononic Inc., where he oversees high-tech product incubation and drives P&L strategy. With a robust background at Intel’s IoT Group, Ryan has successfully led multi-disciplinary teams transforming cutting-edge semiconductor and IoT technologies into scalable,
… Read More
Should the US Government Invest in Intel?