Sagantec’s nmigrate adopted and deployed for 14nm technology

Sagantec’s nmigrate adopted and deployed for 14nm technology
by Daniel Nenni on 05-29-2013 at 3:00 pm

Major semiconductor company successfully migrated 28nm libraries to 14nm FinFET

Santa Clara, California – May 29, 2013 – Sagantec announced that its nmigrate tool was adopted by a major semiconductor company for the development of standard cell libraries at 14nm and 16nm FinFET technologies.
This customer already… Read More


BDA Takes on FinFET-based Memories with AFS Mega

BDA Takes on FinFET-based Memories with AFS Mega
by Daniel Nenni on 05-29-2013 at 12:00 pm

Berkeley Design Automation today announced the first silicon-accurate circuit simulation for mega-scale arrays like memories and CMOS image sensors. If this tool lives up to its claims, it is going to be a big deal for FinFET-based circuits, Memory designers are rightly worried about having the accuracy necessary to include… Read More


Calypto AMD Renesas and #50DAC

Calypto AMD Renesas and #50DAC
by Daniel Nenni on 05-28-2013 at 10:00 am

This year for DAC, Calypto has assembled an impressive lineup of customer presentation, suite sessions and Designer Tracks. To start with customer presentation, Steve Kommrusch, Fellow Design Engineer from AMD will be giving a talk in the Calypto Suite on AMD’s methodology for low power and will show how AMD was able to get further… Read More


AMS Design, Layout and Verification @ #50DAC

AMS Design, Layout and Verification @ #50DAC
by Daniel Nenni on 05-26-2013 at 9:00 pm


Competition in EDA is absolutely necessary in order for the fabless semiconductor ecosystem to thrive. AMS tools with a low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership. That is why Tanner EDA has shipped over 33,000 licenses of … Read More


IROC Technologies CEO on Semiconductor Reliability

IROC Technologies CEO on Semiconductor Reliability
by Daniel Nenni on 05-26-2013 at 8:10 pm

One of the best things about being part of SemiWiki is the exposure to new technologies and the people behind them. SemiWiki now works with more than 35 companies and I get to spend time with each and every one of them. Much like I do, IROC Technologies works closely with the foundries and the top semiconductor companies so it was a pleasure… Read More


Avoiding layout related variability issues

Avoiding layout related variability issues
by Daniel Nenni on 05-26-2013 at 7:55 am

In advanced process technologies, electrical and timing problems due to variability can become a big issue. Due to various processing effects, a circuit performance (both speed and power) is dependent on specific layout attributes and can vary a lot from instance to instance. The accumulated effects can be severe to the point… Read More


A Brief History of NanGate

A Brief History of NanGate
by Daniel Nenni on 05-23-2013 at 8:10 pm

NanGate got started in 2004 by a group of engineers from Vitesse Semi and Intel. The technology and market idea was to address and solve the inherent shortcomings of standard cell based design as compared to full custom. Anyone having tried to push the performance of a standard cell design knows the frustration… if only I had a betterRead More


The Only DM Platform Integrated with All Major Analog and Custom IC Design Flows

The Only DM Platform Integrated with All Major Analog and Custom IC Design Flows
by Daniel Nenni on 05-22-2013 at 10:00 am

As I have mentioned before, Cliosoft is the biggest little company in EDA with the most talked about products on SemiWiki. At DAC, ClioSoft will introduce integrated SOS design management (DM) solutions providing revision control, design management and multi-site team collaboration for Aglient Technologies’ Advanced Design… Read More


CEO Interview: Jens Andersen of Invarian

CEO Interview: Jens Andersen of Invarian
by Daniel Nenni on 05-19-2013 at 9:10 pm

Invarian is an interesting EDA company that sees a niche market opening in the physical verification space. There are a number of converging factors driving this opportunity. Electromigration and voltage-drop for full-chip analysis demands SPICE level accuracy with fast runtimes. Invarian solves that problem with macro … Read More


Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)

Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)
by Daniel Nenni on 05-19-2013 at 9:01 pm

Funny story, @ #49DAC I saw Aart with a very relaxed look on his face looking at the exhibit hall and in my mind he was thinking, “Mine, all mine!” But I digress……. Synopsys is the #1 EDA company for a reason and here is the supporting data for that hypothesis:

Synopsys is committed to accelerating Innovation… Read More