CEVA, the leading licensor of wireless connectivity and smart sensing technologies, is advancing its full-stack wireless strategy with the introduction of next-generation Bluetooth High Data Throughput (HDT) capabilities and a major integrated RF subsystem design win. The announcement underscores CEVA’s growing role… Read More
Author: Daniel Nenni
TSMC Powers Up: 408,000 Batteries Get a Safety Intelligence Upgrade
As semiconductor manufacturing becomes increasingly dependent on uninterrupted power and energy efficiency, battery reliability has emerged as a critical operational issue for advanced fabs. Taiwan Semiconductor Manufacturing Company, better known as TSMC, is addressing this challenge through an ambitious global initiative… Read More
Power-SOI: The Reliability Engine Behind Functional Safety ICs
Power-SOI technology is rapidly emerging as a foundational platform for next-generation functional safety integrated circuits used in autonomous vehicles, industrial automation, humanoid robotics, and other mission-critical systems. The growing convergence of high-voltage power management and low-voltage digital… Read More
CEO Interview with Vivek Raghunathan of Xscape Photonics
Vivek Raghunathan has over 18 years of experience in silicon photonics. He was a Sr. Principal Engineer, Product Architect and Program Leader for Integrated Silicon Photonics at Broadcom driving key core technology development required to co-package optics with switches and demonstrated industry’s first 25.6T Ethernet … Read More
CEO Interview with Baratunde Cola of Carbice
Baratunde Cola is the CEO and founder of Carbice, an Atlanta, Georgia-based company that develops scalable interface solutions to protect semiconductors and electrical components from overheating in any physical environment. He received his bachelor’s and master’s degrees from Vanderbilt University and … Read More
ASML High-NA EUV is Not Ready for High-Volume Production
Contrary to the popular press, ASML High-NA EUV is not ready for logic production yet—and it may never be, at least not in the form originally envisioned. If you remember how long it took conventional EUV to become production-worthy—arguably 5–10 years—this should not come as a surprise. More importantly, this is no longer just… Read More
What Winemakers and Chip Designers Have in Common
Consider this a standout presentation at the Silicon Catalyst Spring Portfolio Update Meeting held yesterday at the Computer History Museum. Mahesh Tirupattur, CEO of Analog Bits, is a modern-day, multidimensional semiconductor hero and one of my trusted few. Analog Bits is a premier member of the semiconductor ecosystem,… Read More
Bronco AI Webinar: Full-Chip SoC Debug in 15 Minutes
A single bug on a full-chip SoC can pull engineers off roadmap work for days or even weeks. It involves massive waveforms, thousands of files of RTL and UVM, and dense specs that aren’t always perfect. Finding these bugs have always been a matter of engineer-hours and how well knowledge diffuses through the organization.
Bronco … Read More
Siemens EDA Expands AI and Advanced Packaging Collaboration with TSMC
At the recent TSMC Technology Symposium 2026, Siemens EDA reinforced its position as one of the key ecosystem partners supporting TSMC in the race toward AI-driven semiconductor design, advanced packaging, and next-generation process technologies. The annual forum has become one of the semiconductor industry’s most important… Read More
Semidynamics Secures a Strategic Investment to Advance Memory-Centric AI Inference Chips
In the rapidly evolving world of artificial intelligence hardware, memory bandwidth and data movement have become just as important as raw compute power. Addressing this challenge head-on, Semidynamics has announced a strategic investment aimed at accelerating the development of its next-generation memory-centric AI … Read More










Enhancing Multi-Domain System Simulation with FMI Co-Simulation