Chip-on-Wafer-on-Substrate, commonly called CoWoS, is an advanced packaging platform developed by TSMC. It allows processors, chiplets, and high-bandwidth memory stacks to be integrated within a single package. CoWoS has become especially important for artificial-intelligence accelerators and high-performance computing… Read More
Author: Daniel Nenni
Comparison of TSMC CoWoS-S, CoWoS-R, and CoWoS-L
Agentic AI Is Reshaping Semiconductor Design
Artificial intelligence is moving rapidly from an experimental aid to a foundational part of semiconductor engineering. In a recent industry talk, leaders from ChipAgents and Analog Devices described how agentic AI could help chipmakers manage soaring design complexity, accelerate product development, and improve the … Read More
Analog Bits Targets the Power Challenge at the Heart of Next-Generation Chips
Analog Bits is expanding its role in advanced semiconductor design with new intellectual property aimed at one of the industry’s most difficult problems: delivering, monitoring, and managing power inside increasingly complex chips.
The company announced that its IP will be included in an upcoming customer test-chip tapeout… Read More
Broadcom’s AI Engine Shifts Into Overdrive
Broadcom’s fiscal third-quarter 2026 results show how artificial-intelligence infrastructure is shifting from general-purpose acceleration toward customized compute and large-scale networking. The company reported AI semiconductor revenue of $16.7 billion, up 221% year over year and 54% sequentially. That expansion… Read More
TSMC’s CoWoS Capacity to Double by 2028—and Rivals Will Still Win Orders
TSMC reportedly plans to double its Chip-on-Wafer-on-Substrate capacity from approximately 130,000 300mm-equivalent wafers per month at the end of 2026 to 260,000 by 2028. The estimate is not formal company guidance and should be treated as a supply-chain projection. Nevertheless, the direction is consistent with TSMC’s… Read More
CEO Interview with Charlie Cheng of CEO of TeRAM
Charlie Cheng is CEO of TeRAM, with four decades of technology experience focused on microprocessor architecture and semiconductor memory. Before TeRAM, he worked on several AI processors, including multiple generations of Meta’s MTIA accelerators beginning in 2019. Previously, he served as CEO of Kilopass, a semiconductor… Read More
ASML Has High-NA and Chipmakers Can’t Say No
ASML’s grip on the most advanced corner of chip manufacturing is tightening. The Dutch company, already the sole supplier of extreme ultraviolet lithography systems, is winning broader industry support for High Numerical Aperture EUV, or High NA, its next-generation technology for printing smaller and denser circuitry.… Read More
Arm targets the agentic AI era with new edge, cloud and robotics platforms
Arm is expanding its computing platform for an era in which artificial intelligence does more than respond to individual prompts. The company expects AI agents to operate continuously across phones, data centers, vehicles, robots and other physical systems—perceiving their surroundings, reasoning about objectives and … Read More
UWB Without the Integration Headache: Ceva and LG Bring Precision to More Chips
Ceva and LG Electronics have joined forces to remove one of the biggest obstacles to ultra-wideband adoption: integrating a complete radio, baseband and software stack into a production system-on-chip. Their joint platform combines Ceva-Waves UWB baseband intellectual property and software with an RF front end developed… Read More
CAST Moves the Full TCP/IP Stack into Hardware at 100 Gbps
CAST has introduced TCPIP-100G, a synthesizable intellectual-property core that implements a complete TCP/IP stack in hardware for ASICs and FPGAs. The core is designed to transmit and receive at up to 100 Gbps without depending on a host processor. That distinction is important: this is not simply a checksum engine or a network-interface… Read More
The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival