Will Agentic AI Help the Open-Source EDA Market?

Will Agentic AI Help the Open-Source EDA Market?
by Daniel Nenni on 08-28-2026 at 8:00 am

Will Agentic AI Help the Open Source EDA Market

Agentic artificial intelligence is likely to give the open-source electronic design automation market a meaningful boost. Its biggest contribution will not be the immediate replacement of established commercial platforms from Cadence, Synopsys, or Siemens. Instead, agentic AI can make open-source tools easier to use, … Read More


TSMC’s Overseas Fabs Are Paying Off

TSMC’s Overseas Fabs Are Paying Off
by Daniel Nenni on 08-28-2026 at 6:00 am

TSMC's Overseas Fabs Are Paying Off

TSMC’s overseas fabrication strategy is beginning to deliver its intended return: not immediate cost parity with Taiwan, but manufacturable geographic redundancy, closer integration with major customers and access to subsidized capacity in strategically important markets. Arizona and Kumamoto are already producing … Read More


AI-designed Chip Points Toward a Faster Future for Custom Silicon

AI-designed Chip Points Toward a Faster Future for Custom Silicon
by Daniel Nenni on 08-27-2026 at 10:00 am

AI Designed Chip Why Redwood Matters

Architect Labs says it has created Redwood, an AI accelerator designed and verified almost entirely by artificial intelligence in less than two weeks. If independently validated and successfully translated from a programmable prototype into manufactured silicon, the project could represent a major change in how computer… Read More


Huawei Can’t Shrink Its Chips, So It’s Folding Them

Huawei Can’t Shrink Its Chips, So It’s Folding Them
by Daniel Nenni on 08-27-2026 at 8:00 am

Huawei Can’t Shrink Its Chips, So It’s Folding Them

On May 25, Huawei semiconductor chief He Tingbo unveiled LogicFolding, an architecture intended to advance chip performance without relying on ever-smaller transistors. Presented alongside Huawei’s “Tau Scaling Law,” the approach prioritizes signal speed over transistor dimensions. It is a genuine engineering response… Read More


A comeback journey: Rebuilding confidence through formal verification

A comeback journey: Rebuilding confidence through formal verification
by Daniel Nenni on 08-26-2026 at 10:00 am

Lindu K

When Lindu Krishna joined Axiomise after a career break, she wasn’t just relearning technical concepts – she was rebuilding her confidence, redefining what it means to be a woman engineer and quietly becoming the person who can take ownership of complex formal verification blocks. Backed by a culture where nobody sits … Read More


Synopsys Wins the AI Silicon Brain Drain

Synopsys Wins the AI Silicon Brain Drain
by Daniel Nenni on 08-25-2026 at 4:00 pm

Synopsys Wins the AI SIlicon Brain Drain

The reported move of Amit Gupta, Jeff Dyck, and Ryan Silk from Siemens EDA to Synopsys matters because this is more than a routine transfer of experienced executives and engineers. Together, the three represent a concentrated body of expertise in applying artificial intelligence to semiconductor design—one of the most strategically… Read More


Webinar: Warpage has a Timing Problem

Webinar: Warpage has a Timing Problem
by Daniel Nenni on 08-25-2026 at 9:00 am

Thermo mechanical (1)

In advanced packaging, warpage is rarely a modeling problem. It is a timing problem.

JOHN BRUGGEMAN


By the time many advanced packages undergo high-fidelity thermo-mechanical analysis, a long chain of decisions has already been made. Stackup. Materials. Die placement. Package architecture. Each decision constrains the … Read More


Avestra: Agentic AI for SystemVerilog Assertion Generation

Avestra: Agentic AI for SystemVerilog Assertion Generation
by Daniel Nenni on 08-24-2026 at 2:00 pm

Avestra Studio Tuple Tech

Modern ASIC, SoC, CPU, and GPU development depends on verification processes that detect subtle functional defects before tapeout. SystemVerilog Assertions (SVA) are particularly important because they encode temporal design intent: how signals, states, and transactions must behave across clock cycles. Unlike conventional… Read More


The Sky’s the Limit: SiFive’s BigSky Brings RISC-V to the Datacenter

The Sky’s the Limit: SiFive’s BigSky Brings RISC-V to the Datacenter
by Daniel Nenni on 08-24-2026 at 6:00 am

The Sky’s the Limit SiFive’s BigSky Brings RISC V to the Datacenter

SiFive is bringing RISC-V closer to mainstream datacenter deployment with the BigSky SF-2U870, an enterprise-grade development server designed for hyperscalers, semiconductor companies, software vendors, and ecosystem partners. Announced in Santa Clara on August 24, 2026, alongside Hot Chips, the rackable 2U platform… Read More


How TSMC Is Wiring the AI Era With Light

How TSMC Is Wiring the AI Era With Light
by Daniel Nenni on 08-21-2026 at 10:00 am

How TSMC Is Wiring the AI Era With Light

TSMC’s photonics strategy is centered on integrating optical input-output with advanced logic, rather than selling conventional optical transceivers as standalone products. The company is developing a silicon-photonics foundry platform and a packaging architecture called TSMC-COUPE, or Compact Universal Photonic … Read More