The rapid growth of signal processing workloads in embedded, mobile, and edge computing systems has intensified the need for efficient, low-latency computation. Rich Fuhler’s update on the RISC-V Packed SIMD extension highlights why scalar SIMD digital signal processing (DSP) instructions are becoming a critical architectural… Read More
Author: Daniel Nenni
Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension
2026 Outlook with Richard Hegberg of Caspia Technologies
Tell us a little bit about yourself and your company
I’m Rick Hegberg and I’ve been CEO of Caspia Technologies since 2024. I have a deep semiconductor background, including CEO roles at three semiconductor start-ups and executive roles at SanDisk/WD, Qualcomm, Atheros, Numonyx/Micron, ATI/AMD, and VLSI Technology.
Throughout… Read More
Accelerating Advanced FPGA-Based SoC Prototyping With S2C
Having spent a significant amount of my career in EDA and IP I can tell you first hand how important picking the right prototyping partner is. I have known S2C since my interview with CEO Toshio Nakama in 2017. It has been a pleasure working with them and I look forward to seeing an S2C update at DVCon the first week of March here in Silicon… Read More
CEO Interview with Moshe Tanach of NeuReality
Moshe Tanach is co-founder and CEO of NeuReality. Prior to founding the company, he held senior engineering leadership roles at Marvell and Intel, where he led complex wireless and networking products from architecture through mass production. He also served as AVP of R&D at DesignArt Networks (later acquired by Qualcomm),
Verification Futures with Bronco AI Agents for DV Debug
Verification has become the dominant bottleneck in modern chip design. As much as 70% of the overall design cycle is now spent on verification, a figure driven upward by increasing design complexity, compressed schedules, and a chronic shortage of design verification (DV) engineering bandwidth. Modern chips generate thousands… Read More
There is more to prototyping than just FPGA: See how S2C accelerates SoC Bring-Up with high productivity toolchain?
System-on-Chip designs continue to grow in scale and interface diversity, placing greater demands on prototype capacity, interconnect planning, and bring-up efficiency. These challenges arise not only in large multi-FPGA programs but also in smaller designs implemented on a single device or a small FPGA cluster. In all cases,… Read More
2026 Outlook with Randy Caplan of Silicon Creations
Randy Caplan is co-founder and CEO of Silicon Creations, and a lifelong technology enthusiast. For almost two decades, he has helped grow Silicon Creations into a leading mixed-signal semiconductor IP company with 500+ customers spanning almost every major market segment. He has driven the development of key technologies … Read More
2026 Outlook with Nilesh Kamdar of Keysight EDA
Tell us a little bit about yourself and your company.
I’m Nilesh Kamdar, General Manager of the Keysight EDA business unit. Keysight is an S&P 500 company that provides design, emulation, and test solutions to help engineers develop and deploy faster with less risk. On the EDA side, we focus on RFMW, high-speed digital,… Read More
2026 Outlook with Paul Neil of Mach42
Tell us a little bit about yourself and your company
I’m Paul, Chief Operating Officer at Mach42. As COO, I am responsible for the business growth of Mach42, as well as driving customer success. My previous roles included VP of Product at Axelera AI, Graphcore and XMOS. I hold a PhD in Electrical Engineering and an MBA in Technology… Read More
Siemens and NVIDIA Expand Partnership to Build the Industrial AI Operating System
At CES in Las Vegas, Siemens and NVIDIA announced a major expansion of their long-standing collaboration, aiming to create what they term the “Industrial AI Operating System.” This ambitious initiative seeks to embed artificial intelligence deeply across the entire industrial value chain—from design and engineering… Read More









Musk’s Orbital Compute Vision: TERAFAB and the End of the Terrestrial Data Center