Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction

We have been hearing so much lately about the power of AI and the potential of technologies like agentic AI to address the productivity gap and complexities of semiconductor designs of today and tomorrow.  Currently, however, the semiconductor industry has been slow to adopt generative and agentic AI for RTL design code.   There have been many reasons for this hesitation such as concerns about the quantity and source of RTL-based training data, plus the verification, quality and reliability of any AI generated code that is so critical for the success of the project. However, to stay competitive, the industry must embrace AI-driven hardware design to lower costs, expand accessibility, improve productivity and drive innovation.

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A new EDA startup, Rise Design Automation (RDA), has developed a solution that enables the use of generative AI for design, verification and exploration that overcomes many of these objections and coupled with the creativity of the human-in-the-loop, dramatically improves productivity to deliver high-quality RTL that is both verifiable and implementable.

RDA in partnership with SemiWiki will host a live webinar,  𝗔𝗰𝗰𝗲𝗹𝗲𝗿𝗮𝘁𝗶𝗻𝗴 𝗦𝗲𝗺𝗶𝗰𝗼𝗻𝗱𝘂𝗰𝘁𝗼𝗿 𝗗𝗲𝘀𝗶𝗴𝗻 𝘄𝗶𝘁𝗵 𝗚𝗲𝗻𝗲𝗿𝗮𝘁𝗶𝘃𝗲 𝗔𝗜 𝗮𝗻𝗱 𝗛𝗶𝗴𝗵-𝗟𝗲𝘃𝗲𝗹 𝗔𝗯𝘀𝘁𝗿𝗮𝗰𝘁𝗶𝗼𝗻 where you can learn more about this solution and have an opportunity to ask questions directly to the technical experts.  In this webinar you will learn how Rise uses a unique combination of raising design abstraction, a comprehensive high-level toolchain and a seamlessly integrated generative AI solution to deliver high quality RTL and architectural innovation in a fraction of the time.

These three technologies together are the perfect combination and complement to each other.   Once the design abstraction is raised beyond RTL, all of a sudden the massive amount of high-level code(C, C++, Python, etc.) that existing LLM’s have been trained on, become a very effective training set for generating quality high-level code.   This overcomes the questions and concerns of RTL-based training data.  Built with industry-first high-level agents and easily deployable with pretrained language models, the Rise AI solution translates natural-language intent into human-readable, modifiable, and verifiable high-level design code—reducing manual effort and accelerating adoption.

Rather than relying solely on AI for Quality of Results (QoR), Rise augments human expertise with a comprehensive high-level toolchain for design, verification, debug, and architectural exploration to generate highly optimized RTL code.  Raising design abstraction and high-level design has been proven over many years to dramatically improve productivity and quality of both design and verification but has not seen widespread adoption due to multiple factors.  These often include adoption/learning curve, lack of expertise in a project, knowing how to consistently get needed QofR compared to hand-coded RTL, verification questions, etc.   Generative AI with specialized high-level tool and language knowledge complementing human creativity and expertise with both assistants and coding and optimization agents can help overcome these challenges – like having a high-level design expert with you at all times.  Additionally, Rise has added support for untimed and loosely-timed SystemVerilog to the existing HLS languages of C++ and SystemC, so that RTL designers and project teams can choose which language best fits both their expertise and adoption comfort level.

This webinar is designed for both engineers and project managers alike.   Attendees will gain insights on into practical applications of AI-driven design methodologies and how AI can be incorporated into the design process without compromising verification rigor. This webinar is designed for both engineers and project managers alike. As SystemVerilog is new as a high-level language, it will then dive into a technical explanation of exactly what it looks like and how it works along with the features of the high-level tool chain and how RTL and verification engineers could use it.   With that foundation, it will then explain the details of the generative AI solution and how it is built and works both to assist, generative, optimize and explore.   The webinar will then conclude with a live demonstration of both the high-level tool chain running on a real design, with code walk-through, simulation results, etc followed by the AI solution interacting with both the design and the tool chain to assist, code-complete, optimize and explore various PPA solutions.   There will be plenty of time for an interactive Q&A directly to the technical team.

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Also Read:

CEO Interview: Badru Agarwala of Rise Design Automation

An Imaginative Approach to AI-based Design