Mobile Storage Interfaces: There are a Lot

Storage interfaces for mobile are evolving rapidly, in particular with the Universal Flash Storage (UFS) standard. So how do you test a design? If you want to test a design that accesses, say, an SD card then you can wander into Fry’s and buy an SD card for a few dollars. But to design an interface to UFS is a bit harder since the devices don’t yet exist, nor does test equipment like protocol generators.

I was at the JEDEC mobile memory conference last week and listened to Yuping Chung of Arasan talk about UFS and verification.

Universal Flash Storageis a JEDEC standard for high performance mobile storage devices suitable for next generation data storage. The UFS is also adopted by MIPI as a data transfer standard designed for mobile systems. Most UFS applications require large storage capacity for data and boot code. Applications include mobile phones, tablets, DSC, PMP, MP3, and other applications requiring mass storage, boot storage, XiP or external cards. The UFS standard is a simple, but high-performance, serial interface that efficiently moves data between a host processor and mass storage devices. USF transfers follow the SCSI model, but with a subset of SCSI commands.

A UFS controller has two major challenges: interfacing to UFS and maintaining backwards compatibility with the older standards (which also have not stopped evolving). Assuming that you are building something like an application processor (AP) for mobile then you want to know you have all those standards nailed and your AP will be interoperable with whatever it needs to be: e.MMC 4.3, 4.4, 4.5, 4.51, 5.x, UFS 1.0, 1.1, 2.x, UniPro 1.40, 1.41,1.6x, M-PHY 1.0, 2.0, 3.0, SD 2.0, 3.0, 4.0, 4.x, UHS-II…phew, that’s a lot of compatibility.

Of course for most people the sensible thing to do is to license IP blocks for UFS from a company like Arasan. However, that moves the problem from your SoC to Arasan, because they still need to perform verification before seeing silicon (and afterwards, of course). The verification splits into two parts, verifying the M-PHY and verifying the digital controller from layers 2 on up including software drivers.

Separate from the PHY is the rest of the UFS system, which actually consists of two parts, a host controller and a device controller.

Finally, using an FPGA based system the whole system can be validated and software development can be done, ending up with everything that is needed for a successful UFS-based design.

Details of Arasan’s M-PHY are here. Details of Arasan’s UFS solution, including host controller and device controller are here. There is a UFS webinar here(registration). There is a webinar on May 8th at 6pm and 9th at 8.30am (pacific) on Mobile Storage Designs for Compliance and Compatibility – UFS/eMMC, registration is here.