UFS or NVMe in Smartphone? See Apple’s answer!

UFS or NVMe in Smartphone? See Apple’s answer!
by Eric Esteve on 10-08-2015 at 7:00 am

There should be a link between iPhone H/W architecture and the incredible success of the product? Let’s assume and claim that this architecture, based on the internally developed ARM based A9 application processor, is simply the best on the market today…

Apple has implemented SSD in MacBook based on NVM Express (NVMe) protocol.… Read More


Prototyping Kits to Accelerate IP Development & Integration into SoCs

Prototyping Kits to Accelerate IP Development & Integration into SoCs
by Pawan Fangaria on 01-04-2015 at 10:00 am

With growing SoC size, complexity, software and hardware content in it and shrinking time-to-market, the SoC design completion in time has become increasingly dependent on IP which need to be sourced (internally or externally), customized according to the design need and integrated together into the SoC. While IP providers… Read More


Getting the best from MIPI IP Toolbox

Getting the best from MIPI IP Toolbox
by Eric Esteve on 01-31-2014 at 4:07 am

The set of MIPI specifications has severely enlarged during the past year. This is a positive point, as the large set of specifications induces a wider choice, and a chip maker can decide to implement a complex specification to differentiate with competitors, or select a specification just tailored to support a basic architecture… Read More


MIPI Alliance Specifications Adoption Status in 2013

MIPI Alliance Specifications Adoption Status in 2013
by Eric Esteve on 01-15-2014 at 11:00 am

At the beginning of December in Paris I had the opportunity to make a presentation to a very impressive audience, technical gurus from companies contributing to MIPI Alliance specification were here, including ST-Microelectronics, Intel, Qualcomm, TI, Toshiba, Nokia, Samsung, to name a few. … Read More


Complete IP port-folio built in less than two years!

Complete IP port-folio built in less than two years!
by Eric Esteve on 12-18-2013 at 10:47 am

We have posted several blogs related to Cadence IP strategy, or I should say new strategy. Each of these blogs was dealing with a particular product, like PCI Express gen-3 Controller IP, latest DDR4 Memory Controller or Wide I/O. This approach was equivalent to describe trees, one after one, and finally ignoring the forest! It’s… Read More


One-Stop Shop for Complete MIPI IP Solution

One-Stop Shop for Complete MIPI IP Solution
by Pawan Fangaria on 05-15-2013 at 8:00 pm

As we know mobile industry is one of the fastest growing in the electronics arena, and it has led to the emergence of several standards of interfaces between processors, devices, storage, camera, keyboard and so on. The interfaces can involve hardware as well as software and can be complex. The standards are still evolving, often… Read More


Mobile Storage Interfaces: There are a Lot

Mobile Storage Interfaces: There are a Lot
by Paul McLellan on 05-06-2013 at 5:39 pm

Storage interfaces for mobile are evolving rapidly, in particular with the Universal Flash Storage (UFS) standard. So how do you test a design? If you want to test a design that accesses, say, an SD card then you can wander into Fry’s and buy an SD card for a few dollars. But to design an interface to UFS is a bit harder since the … Read More


Synopsys MIPI M-PHY in 28nm introduction with Arteris

Synopsys MIPI M-PHY in 28nm introduction with Arteris
by Eric Esteve on 02-29-2012 at 8:05 am

MIPI set of specifications (supported by dedicated controllers) are completed by a PHY function, the D-PHY or the M-PHY function. The D-PHY was the first to be released, and most of the MIPI functions supported in a smartphone we are using today probably still use a D-PHY, but the latest MIPI specifications have been developed based… Read More


Universal Flash Storage: Webinar

Universal Flash Storage: Webinar
by Paul McLellan on 02-24-2012 at 2:24 pm

There has been a general trend for over a decade now towards the use of very fast serial interfaces instead of wide parallel interfaces. This has been driven by a number of different factors ranging from the lack of pins on an SoC, the difficulty of keeping wide parallel interfaces free of skew, limitations on printed circuit board… Read More