When Semiwiki readers see the name Forte Design Systems, they may think of the live bagpipers’ performance that closes the yearly Design Automation Conference. Forte has been the sponsor of this moving end to DAC since 2001. Step with me behind the plaid kilts for a good look at this remarkable company headquartered in San Jose, Calif., enabling remarkable designs.
Forte finished 2012 with 22% growth, and boasted that 2012 was the seventh consecutive year of revenue growth. Better yet, it was named the #1 provider of electronic system-level (ESL) synthesis software by Gary Smith EDA. Forte prefers high-level synthesis (HLS) –– a way for hardware engineers to work at a higher level of design abstraction –– to the ESL acronym and, in fact, is credited with defining the market. Sean Dart, CEO, and Brett Cline, vice president of marketing and sales, cite a strong commitment to high-value software and top-notch support for moving into the top slot.
Forte has been around since 2001, not to sponsor the bagpipers but after CynApps and Chronology merged. The name was chosen appropriately enough because it’s a noun that means “good at” or “strength.” Long-time industry observers will remember that Dr. John Sanguinetti started CynApps in 1998 after Chronologic and VCS, the popular Verilog Compiled Simulator, were acquired by Viewlogic in 1994. (Synopsys acquired Viewlogic in 1997 and continues to sell VCS today.)
Dr. Sanguinetti is Forte’s CTO and knew back in the early 1990s that logic verification and logic synthesis were two big EDA problem areas. He took on logic verification at Chronologic, then turned his attention to logic synthesis, knowing that the change in abstraction levels from gates to register transfer level (RTL) would improve design and verification efficiency. That would be enabled by logic synthesis. In 1998, he and two other engineers founded CynApps to create a higher level design environment, along with a synthesis product that would produce RTL code from higher level designs.
Then came the 2001 merger of CynApps and Chronology with synthesis and verification offerings. Chronology was a verification provider, but not as well known or successful as Verisity (now part of Cadence). With a visible presence and good reputation in the synthesis space, CynApps could attract funding. The decision was made to continue to focus on high-level synthesis and use the verification tools to build a high-level synthesis environment with verification at its core. The move to a high-level synthesis business model was soon validated –– Fujitsu, Ricoh and Sony were among the first Forte customers that year.
Asia’s consumer electronics companies were the first to adopt a high-level synthesis methodology ahead of other regions. Japan’s consumer device designs were a natural fit for this kind of software because HLS can implement image-manipulation algorithms into hardware.
Cynthesizer, Forte’s SystemC high-level synthesis, is selected by development teams who want to reduce time-to-market pressures by designing at a higher level of abstraction and require substantial improvements in circuit size and power. In many cases, teams create designs that would be impossible using RTL. United States, Korea and Japan, in particular, are design centers where Cynthesizer is in use for custom processors, and wired and wireless communication devices.
In 2009, Forte acquired Arithmatica to complement its product offerings with a portfolio of intellectual property (IP) and datapath synthesis technology that has been integrated directly into Cynthesizer.
Moving design to a higher level of abstraction has been a tough challenge that Forte solved and its production-quality tools are going mainstream to prove it. Of course, Forte will be at the 50th DAC in Austin, Texas, and is planning already for the return of the bagpipers this year.
