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A Brief History of Semiconductors

A Brief History of Semiconductors
by Paul McLellan on 10-25-2012 at 3:00 pm

In the last few decades, electronics has become more and more central to our lives. When I was a child the only electronics in the house was the radio and the television, both of which contained tubes. Two big things happened that upended that world: the invention of the transistor and the invention of the integrated circuit. A modern integrated circuit, or chip as some people like to call them, may have over a billion transistors on it and yet sell for just a few dollars. Perhaps more surprising, every one of those transistors works correctly.

As a result, today our cell phones have more power than the supercomputers of yesteryear. Our cars contain dozens of microprocessors. We shop online. We read books on our Kindles or iPads. We play videogames on consoles that are more powerful than the flight simulators of twenty years ago.

Like the comedian who rehearses intensely until it all looks ad-libbed, as it turns out it is really expensive to make electronics that cheap. Chips are built in factories known as fabs (actually short for fabrication line). Fabs cost more than nuclear power plants. They are filled with specialized machines costing tens of millions of dollars each. Chips are designed by teams of hundreds of design engineers and they are surrounded by an ecosystem of specialized software that sells for tens if not hundreds of thousands of dollars per copy without which these chips wouldn’t be possible.

Designing a chip and getting it manufactured is a bit like the pharmaceutical industry. Getting to the stage that a drug can be shipped to your local pharmacy is enormously expensive but when you are done you have something that can be manufactured for a few cents and sold for, perhaps, ten dollars. A chip is like that (although for different reasons). Getting a chip designed and manufactured is incredibly expensive, but when you are done you have something that can be manufactured for a few dollars and enable products that can be sold for hundreds of dollars. The first chip may cost millions of dollars but you can make hundreds of millions of dollars if you sell a lot of them.

So let’s go back to the beginning:

The transistor was invented at Bell Labs in New Jersey in 1947 by John Bardeen, Walter Brattain and William Shockley. The transistor is at the heart of almost all electronics and so it is one of the most important inventions of the 20[SUP]th[/SUP] century. Shockley fell out of favor with Bell Labs and returned to Palo Alto where he had been brought up. He opened the Shockley Semiconductor Laboratory of Beckman Instruments and tried to lure ex-colleagues from Bell Labs to join him. When he was unsuccessful, he searched universities for the brightest young graduates to build the new company. This was truly the genesis of Silicon Valley and some of its culture that still exists today. Shockley is credited with bringing the silicon to Silicon Valley.

Shockley’s management style was abrasive and caused dissension in the ranks but the final straw was when Shockley decided to discontinue research into silicon-based transistors. Eight people, known as the traitorous eight, resigned and with seed money from Fairchild Camera and Instrument they created Fairchild Semiconductor Company. Almost all semiconductor companies, especially Intel, AMD and National Semiconductor (now part of Texas Instruments), have their roots in Fairchild in one way or another. It was where silicon based integrated circuits began, which as it turns out, is the prevailing technology still in use today.

The second big step, the invention of the integrated circuit, took place simultaneously at Fairchild and Texas Instruments from 1957 to 1959. Jean Hoerni at Fairchild developed the planar transistor then Jack Kilby at Texas Instruments and Robert Noyce at Fairchild developed the integrated circuit.

This turned out to be the big breakthrough. Until that point transistors were built one at a time and wired together manually. The planar manufacturing process allowed multiple transistors to be created simultaneously and connected together simultaneously. By 1962 Fairchild was producing integrated circuits with about a dozen transistors. Much has changed in the intervening years but this same basic principle is how we build today’s chips with billions of transistors.

So those two inventions, the transistor and the integrated circuit, really are the key to electronics today and the ways in which semiconductors affects our lives.

A Brief History of Semiconductors
A Brief History of Moore’s Law
A Brief History of ASICs
A Brief History of Programmable Devices
A Brief History of the Fabless Semiconductor Industry
A Brief History of TSMC
A Brief History of EDA
A Brief History of Semiconductor IP
A Brief History of SoCs


4 Billion CEVA powered Chips shipped

4 Billion CEVA powered Chips shipped
by Eric Esteve on 10-24-2012 at 8:34 pm

Why making the difference between chips and cores, when mentioning that CEVA’s customers have shipped four billion IC to date? Because that can make a big difference! Imagine for example an IP vendor selling processor IP cores to be used in massively parallel computing application, when the chip maker create a processor NxM matrix, where every IP core is duplicated (N x M) times… When you ship one chip, you also ship N x M cores.

In the SC industry, we evaluate a market made of IC shipments, and even if an IP is instantiated multiple times in the same chip, at the end of the day, we just count the shipment of such a chip – called “unit” – to calculate a market share. If anybody prefers to start counting IP cores, I strongly suspect that the standard cell Library vendors will end up winning the game…

Let’s come back to the exponential growth of units shipped by CEVA’ customers. What kind of application has allowed such a growth during the last couple of years? I am sure you guess it, and you are right: smartphone! But not only, as CEVA DSPs have now powered audio/voice in more than 2 billion devices, including many of the world’s leading gaming console, set-top-box, DTV, home audio devices… and smartphone. When looking at CEVA’s customer list, many of the world’s leading electronics brands, including; HTC, Huawei, Lenovo, LG, Motorola, Nintendo, Panasonic, Philips, Samsung, Sanyo, Sharp, Sony, Toshiba and ZTE are represented. Just like with ARM processor core, CEVA DSP IP core have been first implemented in the wireless segment, to run the baseband processing (for the DSP) and the application processing (starting with ARM7 in the 90’s, up to ARM CortexA9 double core today), and these IP cores are now used in various market segments.

Listening to Will Strauss, President of Forward Concepts, help understanding the winning strategy: “I congratulate CEVA for its monumental achievement of reaching 4 billion CEVA-powered chips shipped. It affirms CEVA’s clear market share lead in DSP IP and is a testament to its dedicated customer base. In recent years, CEVA has re-defined the classical DSP architecture by introducing special purpose DSPs such as the CEVA-XC that enable software-based modems and a unified platform for LTE, LTE-Advanced 802.11ac and 3G, with power and die size metrics on a par with fixed function modem designs. This new era in DSP technology along with strong customer traction for its LTE DSPs ideally positions CEVA to further expand their leadership in DSP IP as we enter a new era of wireless communications.” T

he magic word is “special purpose DSP”, this means that the one size fits all DSP IP concept is no more adapted to the market demand. Gideon Gideon Wertheizer, CEO of CEVA, explains this new paradigm: “For next-generation products requiring even more DSP horsepower – fixed function DSPs or DSP-configured CPUs are unable to match the flexibility, performance, power and die size of our new DSP offerings for baseband (CEVA-XC), audio/voice (CEVA-TeakLite-4) and imaging /vision (CEVA-MM3000).” If we look at these three different families:

  • CEVA-TeakLite DSP family is the most successful licensable DSP family in the history of the semiconductor industry, with more than 3 billion chips shipped, over 100 design wins, 30 active ecosystem partners and more than 100 audio and voice codecs and software applications available.
  • CEVA-XC family of DSPs is designed specifically to overcome the stringent power consumption, time-to-market and cost constraints associated with developing high-performance multimode baseband solutions. It supports multiple air interfaces for various applications such multimode cellular baseband (2G/3G/4G), connectivity (WiFi 802.11ac, GNSS), digital broadcast (DVB-T2, DVB-S2, ATSC) and smart grid.
  • For imaging and vision applications, the CEVA-MM3101 is a unique, fully programmable platform that is dedicated to addressing the extreme computational needs of any image enhancement or vision use case. By off-loading the device’s main CPU and replacing multiple hardwired accelerators for performance-intensive imaging and vision processing tasks, the highly-efficient CEVA-MM3101 dramatically reduces the power consumption of the overall system, while providing complete flexibility in terms of standards, imaging functions, and vision applications.

To learn more about CEVA DSP and platforms, visit http://www.ceva-dsp.com/DSP-Cores.html.

What is the electronic application exhibiting the highest growth and generating huge profits for (two) successful OEM (Apple and Samsung) in 2012? What is the wireless communication standard that any smartphone manufacturer has to support, if he wants to be successful tomorrow? Long Term Evolution, or LTE! The LTE baseband shipments have been forecasted by Strategy Analytics (note that they forecast IC shipments, not end devices and generally the chips are shipped one quarter before the device is sold in the market). We have used the data extracted from the Table (below) to build a graphical view of the smartphone (red) and LTE chips (blue) forecast (see the above picture). Also, note that baseband numbers include shipments to non-handset devices such as the Apple iPad 4G and Samsung Galaxy Tab 4G.

Clearly, LTE is the place to be today to prepare the future shipments, as these will bring revenue under the form of royalties.

  • CEVA has now achieved more than 20 customer design wins for its LTE/LTE-Advanced DSP technologies, reaffirming the company’s dominant position as the #1 DSP licensor for wireless baseband. CEVA’s publicly announced customer wins for LTE/LTE-Advanced include Broadcom, Intel, Mindspeed and Samsung, in addition to a number of unannounced tier 1 handset and infrastructure OEMs.
  • According to Stuart Robinson, Director of the Strategy Analytics Handset Component Technologies service, “Based on our analysis, LTE basebands powered by CEVA DSP cores are now shipping in the millions, second to Qualcomm. These shipments are expected to further accelerate as new CEVA-based LTE smartphones are being rolled out by tier 1 OEMs.”

Finally, recently published industry data by The Linley Group revealed that CEVA continued to dominate the DSP IP shipments market in 2011, with shipments of CEVA-powered DSP chips surpassing that of any other DSP IP licensing company by more than a factor of 3x. We can guess that the cumulated shipments of CEVA DSP-powered chips (not core) will continue to outperform the DSP IP competition in the future…

Eric Esteve from IPNEST


CDNLive Call For Papers

CDNLive Call For Papers
by Paul McLellan on 10-24-2012 at 6:44 pm

The Silicon Valley CDNLive, the Cadence user conference, will be on March 12-13th 2013 in Santa Clara. But the heart of CDNLive are customer presentations and the call for papers is now open. The deadline is December 4th (at 5pm PST for people who really like to come down to the wire). At this point only an abstract is required.

There is a huge list of suggested topics, but topics that will be hot in 2013 are:

  • Sign-off
  • Advanced node
  • 3D IC
  • Low power
  • Mixed-Signal
  • Design IP
  • System Design and Verification
  • PCB Design

If your paper is accepted then you could win an iPad4. You can also attend CDNLive for free. Conference registration will open in January.

More details are here.


2nd International RRAM Workshop at Stanford

2nd International RRAM Workshop at Stanford
by Ed McKernan on 10-24-2012 at 5:00 pm

The 2nd International Workshop on Resistive RAM. The workshop was the second installment of an annual series organized by Stanford University and the Belgian research institute Imec. Like most RRAM workshops, this year’s event featured talks focusing on the physics of RRAM devices and their underlying switching mechanism(s). However, roughly equal attention was paid to design and architecture aspects of RRAM technology and to potential RRAM applications other than its use as a NAND replacement, such as a talk on low power programmable logic from LEAP/NEC. This seemed to reflect a general feeling that the R&D efforts on RRAM of the past decade may soon yield a usable technology, or perhaps even several technologies from different companies. The workshop also gave particular emphasis to the question of what the requirements are for a selector device for RRAM, and how close various selector technologies are to meeting these requirements. For more info, follow the link ReRAM-Forum.com


The Auto Industry Speaks @ Renesas DevCon

The Auto Industry Speaks @ Renesas DevCon
by Holly Stump on 10-23-2012 at 9:00 pm


This year’s Renesas DevCon in Orange County, CA kicked off yesterday with an impressive lineup of speakers, record attendance, and an increased focus on automotive.

TheAuto Industry Speaks,” an Expert Panel organized by Martin Bakerof Renesas, featured:

  • Yoichi Yano, RenesasExecutive VP and Member of the Board, who early in his career designed the original 850 MCU, the world’s most popular automotive controller
  • Michael Grimes, Technical Fellow, Semi, MCU & Controller Architecture at General Motors
  • Ian Wright, CEO at Wrightspeed, former cofounder Tessla Motors
  • Bob Adams, Hardware Team Leader, Interior, Body and Security, at Continental
  • Mike Bourton, Founder of Grid2Home


Insights? Sustainable mobilityclearly emerged as one of the big challenges, requiring both technical solutions and government/infrastructure/other aspects. Ian commented: Burning oil is a problem; some vehicles burn natural gas; we focus on electric cars, but the problem is still energy! Michael Grimes: It’s the same as always, we need to be more efficient, but we’ve picked all the low hanging fruit, so it becomes more expensive to improve efficiency. Now, MPUs for state-dependent behavior (based on altitude, warm or cold engine, etc.) may help reduce energy consumption. Yano-san: Automotive MPUs used to consume a lot of power, now they consume less; this allows tens of MPUs per car. Bob: Electric vehicles are even more sensitive to electronics power (range problem). New opportunities in controller design to lower power consumption. Ian responded: But, electric cars consume lots of amps, the MPU power is negligible. Bob: We need infrastructure for charging vehicles, complex issues.

Money, money, money:spirited discussion of why $40K for an electrical vehicle (EV) comparable to a $20K auto! In defense: expensive batteries, motors, extra electronics, low tire rolling resistance, etc. Lots of redundancy: electric storage and fuel storage, more cooling systems, engines for electric and fuel. The bad news: “The MPUs cost nothing compared to other components. so Moores Law will not help us….nor will volume. We may get to fewer, larger chips per car, take some silicon costs out, but this is a small part.”

Panelists also discussed the types of vehicles that represent the biggest growth for electric or hybrid propulsion. Ian stated, yes, look for vehicles that use a LOT of fuel, such as heavy duty trucks; especially those with a lot of stop/start action like garbage trucks (3 year payback for them vs passenger cars, which today require 7 yrs or government subsidy for ROI.) Range anxiety is a huge problem for electrical cars. Big batteries increase weight and cost, as well as time to ROI so range-extended EVs are important, because they can use existing infrastructure (gas). Michael G: Range anxiety is very real; why Chevy Volt is successful. Mike B: Other technologies like solar, wind, must be stored, so battery technologies must evolve for many applications.

AUTOSAR:effective in addressing industry challenges? Mike G: Autosar is to automotive software as Windows is to pc software…..(laughter.) The general consensus was that Autosar does not achieve all goals, but achieves many of them: not perfect; definitely committee-developed; and its layered OS can represent significant overhead when in real time and need fast response. But, it’s the predominant architecture, helps manage complexity (100M lines of code per car typical), and is a good first step to unify the industry which is key. Note: many Tier 1 companies say they have taken Autosar and customized it.

Autonomous vehicleswere recently touted, will this be a revolutionary or evolutionary change? 2 years or 10? In fact, depending on how we define autonomous, many capabilities already available in the helped or aided category, like cruise control and backup visibility/ monitoring. Ian said, his cars have driver assistance like slip control and they could go further, but don’t; must use driver control as gospel to avoid liability, especially in the US. Panelists felt the time will come; safety must be considered; needs lots of computing power, but we have this technology. Opportunities: Lots more electronics!!! Much more throughput would need to be added. Wireless and infrastructure. Sensing as well as compute power. Power and heat management for added electronics. Yano-san commented that active safety and autonomous cars are definite roadmap drivers; constant balance needed re: capability and power consumption of chips (sensors and processors.) A very exciting area. Emerging opportunity for vehicle-to-vehicle standard communications… standards important here… this fuels the dream of fully autonomous vehicles.

Have software toolshelped automotive get this far?
A resounding YES and thumbs up to model-based design, design re-use, and tools that support huge projects with many people, distributed around the world.

Toshihide Tsuboi, Senior VP for MCU Business at Renesas,contributed a
perspective: Previously, in the first wave, minimizing fuel consumption, and emissions, were the main drivers for advanced electronics controls in automotive. The current frontier is functional safety, such as ISO26262 standards, and again MCUs must handle these challenges. Next, the exciting emerging area is ADAS, Advanced Driver Assistance Systems, which includes performance of MPUs for information handling, as well as sensors, displays, etc. At this time, no one really knows yet the amount and speed of information that will ultimately be involved in sophisticated ADAS, but it is increasing dramatically.

Takeaway: As Michael Grimes commented, electronics has made all the difference in the last few decades! Complexity up, power down. Great opportunity persists for automotive semiconductor and electronics companies who accurately gauge and respond to the trends…and thanks to Renesas DevConand all panelists for sharing the insights!

(Note: The above is paraphrased from notes, not verbatim, captured gist of remarks.)


Power and Reliability Challenges

Power and Reliability Challenges
by Paul McLellan on 10-23-2012 at 12:38 pm

Last week I attended the Ansys/Apache seminars on “Dimensions of Electronic Design.” The two big challenges as we go down to 28nm and 20nm and below are keeping power manageable and keeping reliability up.

The big challenge with power is that we can put so much stuff on a die and clock it so fast that the power is exceeding the capability of batteries (which only increases slowly, not exponentially) and even exceeding thermal limits of either the package itself or the system (think smartphone).

Noise is another huge problem. With higher drive devices the average current may only increase slowly but the transient current is going up much faster. In turn this leads to inductive effect with fast changing currents. But as the supply voltage comes down we can’t scale the threshold voltage much (for leakage reasons) meaning that the noise margin reduces every process node, although FinFETs may give a one-time kick since they have better leakage characteristics.

Another thing I had not realized is that in 28nm and below a lot of signal lines need to be analyzed for electro-migration (EM) effects. A minimum width metal line with a high-powered buffer violates the EM constraints.


An integrated power-centric design methodology needs to start with RTL power analysis. Getting the architectural decisions right has a much bigger effect than anything that can be done later tweaking things during physical design. Going forward, one thing that will increasingly be important is whether or not to use 3D chips with TSVs. This can have a huge effect on timing and power (because the distances are so much shorter). Although there are inaccuracies at the RTL level, they are smaller than might be expected and, besides, waiting until gates are available is too late in the design cycle.

Later, once physical design is done, a full analysis can be performed. This can include a whole spectrum of tests that are becoming more and more important:

  • off state leakage/voltage checks
  • inrush current (powering up blocks)
  • differential voltage checks
  • time to rampup (power up blocks)
  • noise coupling checks
  • switch id-sat check

Finally, the speeds and noise sensitivity of everything means that the chip, package, system must all be analyzed together, including the whole power delivery network with decaps etc. There is not enough margin to analyze each part separately and the risks are that it is underdesigned (aka fails) or overdesigned (aka too costly). Of course, if this is a 2.5D (interposer) or 3D design then this will need to be a multi-die analysis.


Learning about MEMS in Israel from: EDA companies, Foundry, University, Users

Learning about MEMS in Israel from: EDA companies, Foundry, University, Users
by Daniel Payne on 10-23-2012 at 12:24 pm

In April I attended and blogged about a webinar on MEMS and IC co-design hosted by two EDA companies: SoftMEMS and Tanner EDA. On October 30th you can attend a full-day event in Israel that is more comprehensive than the webinar that I attended. Continue reading “Learning about MEMS in Israel from: EDA companies, Foundry, University, Users”


Google Datacenter

Google Datacenter
by Paul McLellan on 10-22-2012 at 5:42 pm

In my blog about Intel’s latest results I linked to an interesting article in Wired about Google’s datacenters.

I happened to be browsing some websites in the Netherlands (actually I don’t speak a word of Dutch, a Dutch friend pointed it out to me) and there is an article showing how the pictures that accompany the Wired article have been photoshopped. You don’t need to be able to read Dutch to get the basic idea, the pictures are animated to show where one side of most of the pictures is cut and pasted from the other side (after reflection).

You can run the whole article through (irony of ironies) Google Translate to get a version in bad English (double dutch?).


Hybrids on BeO then, 3D-IC in silicon now

Hybrids on BeO then, 3D-IC in silicon now
by Don Dingee on 10-21-2012 at 8:10 pm

Once upon a time (since every good story begins that way), I worked on 10kg, 70 mm diameter things that leapt out of tubes and chased after airplanes and helicopters. The electronics for these things were fairly marvelous, in the days when surface mount technology was in its infancy and having reliability problems in some situations.

One of the problems with surface mount in the early going was the coefficient of thermal expansion, or more accurately the difference in CTE between the ceramic packages needed for defense-style temperature range requirements (-55 to +125C), and that of the FR-4 fiberglass most printed circuit boards were constructed from. With a few heating and cooling cycles, the ceramic packages would grow or shrink at a different rate than the board underneath them, stress the solder joints, and cause cracks or breaks. BGA, solder balls, and other fine pitch techniques were yet to be invented.

The solution for dense electronics in small places with wicked temperature extremes was hybrid microelectronic assemblies, and with some improvements in materials and process it still is today. The “for dummies” (and I resemble that remark) version:

1) Print the circuit on a ceramic substrate. At the time, the technology for substrates was beryllium oxide, viciously toxic in particle form when inhaled, but quite safe made into non-porous substrates. (One designer I worked with had a BeO coffee mug he drank from everyday to prove the point.) BeO also has super high thermal conductivity, providing a conduction cooling path. Today, you’re more likely to find aluminum nitride (AlN) in use.

2) Drop chips in raw die form onto the substrate in their proper locations.

3) Bond the pads on each chip to the corresponding pads on the substrate with thin gold wires – pretty much the same thing done inside a single IC package, except on a much larger scale with a lot of various dies and connections.

4) Put the finished circuit substrate into a Kovar metallic case, with I/O pins, and seal the edge with a weld so it’s hermetic.

5) Solder several hybrids to a flex harness providing interconnects between hybrids and connectors to other subsystems to make up the final assembly.

The lesson from electronics history is good ideas don’t go away when they are supplanted by innovation; they come back when a similar problem arises again on a smaller scale.

The idea of 3D-IC has been percolating for some time, and it’s the modern version of hybrids. The scale and materials are different, but as the TSMC name suggests – CoWoS, chip on wafer on substrate – it’s the same concept, minus wires and metal cases, and implemented completely in an EDA flow. This isn’t just to get more stuff in less space by better utilizing the Z axis, as the 3D name would imply. It’s about using the right process for the right function. Using silicon micro-bumping and through-silicon vias (TSVs) , a complete subsystem in proven silicon can be installed on a newly designed piece of 20nm digital logic. The EDA breakthrough will be making that a smooth flow instead of manual design and extra process steps.

With all the chatter about 28nm, 20nm, 14nm, and beyond, many folks might have lost sight that analog processes are no where near those geometries, and they don’t need to be. They are built out on mature, low risk, low noise process nodes. While analog is obviously involved in A/D and D/A converters, there are also MEMS sensors, and networking PHYs, and wafer-scale cameras and microphones that can all take advantage of a 3D process, without having to be redesigned into a cutting-edge geometry. Sematech summarized this nicely:

Memory subsystems are also becoming decidedly more analog in their signaling characteristics as speeds increase. Our Eric Esteve wrote earlier in a post discussing Cadence’s JEDEC Wide I/O mobile DRAM IP, and its target of 100Gbit/sec of DRAM bandwidth. Taiwan’s Industrial Technology Research Institute (ITRI) and TSMC both recently reported working with Cadence to tape out Wide I/O designs and prove out the new CoWoS flow.

If you missed the first round of hybrids, the idea is back, and it’s all in silicon this time. 3D-IC opens up a whole new range of possibilities for SoC design, not unlike what we’ve already seen at the microcontroller level on less aggressive process nodes with integrated mixed-signal EDA flow. The microcontroller-on-steroids with a much faster digital core, memory subsystems, and multiple analog I/O systems quickly and completely blending mature analog process nodes with advanced digital nodes is close at hand.


Why Blog on SemiWiki.com?

Why Blog on SemiWiki.com?
by Daniel Nenni on 10-21-2012 at 7:00 pm

The Semiconductor Wiki Project, the premier semiconductor collaboration site, is a growing online community of professionals involved with the semiconductor design and manufacturing ecosystem. Since going online January 1st, 2011 more than 400,000 unique visitors have landed at www.SemiWiki.com viewing more than 3M pages of blogs, wikis, and forum posts. WOW!

Anybody can blog on SemiWiki and quite a few people do for personal fulfillment and professional enrichment.

Today everything and everyone is connected and crowd sourced. In fact, all social media, from blogs, to forums and wikis have a profound impact on how people communicate, search for information, and make decisions. Both personally and professionally, social media is no longer an experiment or a moonlighting function, social media is now an integral part of how we communicate.

Blogging is a life changing experience. Blogging is personal branding and can take you from relative obscurity to an internationally recognized industry professional. Blogging is mind expanding and develops communication skills you may never have known possible. One warning however, blogging is addictive. Once you turn it on it is very hard to turn off.

For me blogging is where I think, plan, and reflect. Blogging encourages me to research, gather credible information, and test hypotheses. Blogging is sometimes dangerous and nurtures my risk taking side but also extremely collaborative and provides a real-time feedback loop never before possible. Most importantly, my wife reads my blogs and now after 30+ years together she actually knows what I do for a living besides sitting in my La-Z-Boy with my laptop. She now knows what a semiconductor is, what EDA means, and why semiconductor IP is so important to our everyday lives.

As a SemiWiki blogger you will get personal invitations to industry conferences, seminars, and webinars. You will get exposure and access to semiconductor professionals at all levels, from CEOs to CTOs to engineers, marketing, sales, and public relations people, the entire semiconductor ecosystem at your fingertips.

5 things you should know about SemiWiki:

[LIST=1]

  • SemiWiki is global. Your experience here will be from around the world with an incredible amount of information at your fingertips. Make sure you connect and interact, make sure you engage at all levels.
  • Build relationships and network. You can truly connect here with people whom you have not met. Make friends and create a global support system for your professional life.
  • Take the good and the bad. Distinguish between fact and opinion, objective and subjective. People will either like or dislike your posts and there is something to be learned from both.
  • Don’t be evil. Top influencers will have one thing in common, they use their influence for the greater good.
  • Be yourself.Impersonating others online is a crime so just be yourself. Share your knowledge, share your profession, share your passion. You don’t have to be an expert or industry icon to be a top influencer on SemiWiki.

    Take control of your social media destiny, join SemiWiki and start blogging today! If you need further convincing feel free to contact me directly on LinkedIn http://www.linkedin.com/in/danielnenni It would be a pleasure to link to you and share my 13,000+ connections.