Design Automation and the Engineering Workstation

This is the seventeenth in the series of “20 Questions with Wally Rhines”

Several common aspects have existed for what is now the modern Electronic Design Automation (EDA) industry. When I joined TI in 1972, the company was very proud of its design automation capability as a competitive differentiator. Much of the success of TTL for TI came from the ability to crank out one design per week with automated mask generation with the “MIGS” system. Other semiconductor companies had their own EDA capability. So it was somewhat revolutionary when Calma introduced its automated layout system at about the same time that Computervision and Applicon did the same, all based upon 32 bit minicomputers. Computervision, Calma and Applicon became the big three of the first generation layout tools.

TI considered these newcomers as a threat. Development progressed upon a system based upon the TI 990 minicomputer. Meanwhile, our competition largely moved to Calma and, in some cases, Applicon. Design engineers were rebelling when I arrived in Houston in 1978. We were using the TI 990 based “Designer Terminal” with Ramtek displays to do the layout editing with a light pen. Designs were digitized on home grown systems based upon layouts that were created by draftspersons (mostly draftsmen) on a grid matched to the design rules of the chip. Our people wanted to buy a Calma system. However, just as we got our first Calma, GE acquired Calma and quickly destroyed the company. With the introduction of the Motorola 68K in early 1979, a host of companies, including Apollo, began developing a new generation of engineering work stations.

By now, the management of TI’s Design Automation Department, realized the limitations of its approach. The 1982 Design Automation Conference in Las Vegas further affirmed the need to move to a next generation approach. So TI became one of the first major semiconductor companies to commit to the newly introduced Mentor Idea Station product based upon the Apollo workstation. Internal support groups in large corporations don’t usually surrender their corporate roles, despite their competitive disadvantage, and TI was no exception. A plan existed to complement the Mentor software with DAD-developed software. Mentor readily agreed since TI was a very large customer win. TI’s management accepted the whole strategy because of the strong history of success of DAD in maintaining a competitive design advantage for integrated circuit design.

Subsequently, the Daisy-Mentor-Valid competition ensued. Mentor turned out to be a good choice because it was based upon the Apollo workstation and Mentor resources were not tied down to developing new hardware, as were the Daisy and Valid teams. But TI was not one of Mentor’s most desirable customers. The DAD engineers were experts in design software and they wanted to tweak the system capabilities as well as to add major new functionality. Mentor had realized major success with systems companies in aerospace, defense and automotive industries and was rapidly becoming a worldwide standard, especially in Europe. Meanwhile, my role in the TI Semiconductor Group changed. I was appointed President of the TI Data Systems Group, TI’s $700 million revenue business in minicomputers and portable terminals and was moved to Austin, Texas. While I was away over the next three years from late 1984 through mid 1987, a decision was made to divorce TI from Mentor and port our own TI software to the Apollo workstations. In mid-1987, I returned to Dallas as Executive VP of the Semiconductor Group only to find that the original move to commercially available design automation products had been reversed. TI was once again an island in an industry that was building upon broad innovation from a diverse set of designers working with commercial EDA suppliers. Unlike the early semiconductor history when TI had nearly 40% market share, TI now had 10% to 15% share and the economies of scale didn’t justify custom design tools.

One of the entities that reported to me initially as EVP of the Semiconductor Group was DAD. I appointed Kevin McDonough, who later became Engineering VP of Cyrix Semiconductor, to assess our position in design automation and recommend a solution. Kevin did the evaluation and came back with an answer: Adopt the Silicon Compiler Systems design automation platform and move ahead to “RTL based” design. And so we did. We committed $25 million to SCS and started a conversion of the MOS portion of our design business to SCS. Few people even remember that SCS, which was an outgrowth of an AT&T Bell Labs spin-out called Silicon Design Labs, or SDL, actually developed the entire language based top-down design methodology before VHDL and Verilog even existed. TI and Motorola were among the first adopters. The TI sale gave SCS the credibility for an acquisition by Mentor Graphics at a premium price. Why would Mentor acquire SCS when they already had a strong IC Station product that could effectively compete against Cadence Virtuoso predecessor products? The answer: a tops-down, language methodology was clearly the direction of the future for the semiconductor industry. The problem: The two methodologies (Top Down, language based versus detailed layout) were disruptively different. Traditional designers viewed RTL design as the province of “computer programmers”. “Real” IC designers knew how transistors worked and could craft superior IC’s with a detailed design and layout system.

What evolved was internecine warfare. Hal Alles, VP of IC Design at Mentor, veteran genius developer from Bell Labs and founder of SDL, had the undesirable challenge of convincing the two groups to work together. They didn’t. Step by step, the SCS designers denigrated the traditional IC design approach and Mentor’s message was bifurcated. The result: a window for Cadence to become the clear leader in traditional IC detailed design. Meanwhile, other companies exploited the fact that SCS had a closed system for language based design using two languages, L and M, which were proprietary. VHDL and much later Verilog, became public domain languages for top-down design. DAD was one of the organizations that reported to me at TI during the 1982 through 1984 period. We initiated a research proposal to create an open language for top-down design called VHDL, or VHSIC Hardware Description Language. In 1983, we were granted a contract to develop VHDL with IBM and Intermetrics as co-developers. I was one of five speakers at a special event to announce the plan in 1983. In 1987, VHDL became an IEEE standard 1076. In 1985, Prabu Goel formed a company, Gateway Automation, that subsequently developed an even simpler language called Verilog. The company was acquired by Cadence.

The final result: Engineers who were accustomed to schematic capture were gradually displaced by language based developers. The EDA industry went into one of its major discontinuities, the transition from schematic capture to RTL based design. Mentor lost a lot of momentum and SCS never really became a standard for RTL based design although it might have been if it had made its languages open.

The 20 Questions with Wally Rhines Series