Laker IC Layout Update at DAC

Laker IC Layout Update at DAC
by Daniel Payne on 06-23-2012 at 1:22 pm

Taiwan’s most famous EDA company is SpringSoft so on Wednesday at DAC I met wtih Dave Reed, Director of Marketing to get an update on what’s new with their IC layout tools.


Q: What’s new with Laker?
In April we introduced Laker 3: Now OA native (not old database) and we have 6 to 10X faster for disk access compared to other tool integrations.

Performance is faster by redrawing, 5X faster. Using power of graphics card support.

GUI is now using QT, more of a standard way to interact.

Schematic, Layout, Routing all unified instead of separate binaries.

Two of the top five fabless semi companies have standardized on Laker (not Cadence, Mentor, Synopsys).

Uses of Laker: Analog, Memory, Custom Digital, IP development (standard cells), full chip assembly (Laker Blitz).

Main users of Laker: Analog and Memory (4 of 5 top memory companies: SRAM, Flash, DRAM, FCRAM).

Custom Digital P&R – used by memory companies.

IPL supports PyCells, and SpringSoft is a founding member. Cadence insists on Pcell approach which is not interoperable.

Foundries are support iPDKs now, so Laker supports iPDK.

SPringSoft moves PDKs with Pcells into an iPDK format using PyCells.

Dominant EDA tool provider of IC schematics and layout in Taiwan. Growing world wide. About 500 people, a public company now in Taiwan. 50 in San Jose.

12 months from now – look for announcements in Cadence customers moving over to SpringSoft.

How about ICscape from China? We have heard about them.

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