22nd ACM/IEEE International Workshop on System-Level Interconnect Problems and Pathfinding (SLIP^2)

22nd ACM/IEEE International Workshop on System-Level Interconnect Problems and Pathfinding (SLIP^2)
by Daniel Nenni on 09-05-2020 at 8:00 am

GENERAL INFORMATION

The 2020 ACM/IEEE International Workshop on System-Level Interconnect Problems and Pathfinding (SLIP^2) is the 22nd, “rebooted” edition of the System-Level Interconnect Prediction (SLIP) Workshop. As computing systems and applications grapple with a post-Moore, post-CMOS, post-vonRead More


Facts Support New Emergence in Semiconductor Landscape

Facts Support New Emergence in Semiconductor Landscape
by Pawan Fangaria on 01-03-2015 at 9:00 am

As we left an exciting year 2014 which is poised to record 7+ % increase in semiconductor revenue (~ $338 B) compared to 2013 (~ $315 B) and entered into another promising year 2015 for semiconductors, I looked back over the year bygone and collected inferences from some of the major important events which clearly convey how 2015 can… Read More


EDPS: SoC FPGAs

EDPS: SoC FPGAs
by Paul McLellan on 04-09-2012 at 4:00 am

Mike Hutton of Altera spends most of his time thinking about a couple of process generations out. So a lot of what he worries about is not so much the fine-grained architecture of what they put on silicon, but rather how the user is going to get their system implemented. 2014 is predicted to be the year in which over half of all FPGAs will… Read More