Tag: synopsys

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya
by Daniel Nenni on 05-03-2024 at 10:00 am

Dan is joined by Mayukh Bhattacharya, Engineering, Executive Director, at Synopsys. Mayukh has been with Synopsys since 2003. For the first 14 years, he made many technical contributions to PrimeSim XA. Currently, he leads R&D teams for PrimeSim Design Robustness and PrimeSim Custom Fault products. He was one of the early… Read More

Webinar: Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors

Webinar: Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors
by Admin on 05-01-2024 at 1:03 pm

Thursday, May 30, 2024 | 10:00-11:00 a.m. PDT

Many automotive applications require processing workloads with minimum latency and precise timing budgets.  This is especially true for safety-critical applications like adaptive cruise control and anti-lock braking, where human life may be jeopardized.  These systems require

… Read More

Synopsys & AMD Webinar – Final Frontier: The Next Generation of 3DIC Interposer/InFO Design

Synopsys & AMD Webinar – Final Frontier: The Next Generation of 3DIC Interposer/InFO Design
by Admin on 04-23-2024 at 1:34 pm

In recent years, the semiconductor industry has experienced a breakthrough in the onset of 2.5D and 3D chiplet-based products. These products promise to extend the limits of Moore’s Law while demolishing limitations on speed and capacity for our highest tiers of compute. But for all the adulation we heap upon the 3DIC paradigm,

… Read More

Podcast EP219: How Synopsys Addresses Debug and Coverage Closure Challenges with Robert Ruiz

Podcast EP219: How Synopsys Addresses Debug and Coverage Closure Challenges with Robert Ruiz
by Daniel Nenni on 04-19-2024 at 10:00 am

Dan is joined by Robert Ruiz, product management director responsible for strategy and business growth of several verification products at Synopsys. Robert has held various marketing and technical positions for leading functional verification and test automation products at various companies including Synopsys, Novas… Read More

Posted on

Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!

Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!
by Eric Esteve on 04-19-2024 at 6:00 am
Categories: Arm, IP, IPnest, Semiconductor Services, Synopsys

Top10 Table 2023

Design IP revenues had achieved $7.04B in 2023, with disparity between license, growing by 14% and royalty decreasing by 6%, and main categories. Processor (CPU, DSP, GPU & ISP) slightly growing by 3.4% when Physical (SRAM Memory Compiler, Flash Memory Compiler, Library and I/O, AMS, Wireless Interface) slightly decreasing… Read More

Posted on

Early SoC Dynamic Power Analysis Needs Hardware Emulation

Early SoC Dynamic Power Analysis Needs Hardware Emulation
by Lauro Rizzatti on 04-16-2024 at 6:00 am
Categories: AI, EDA, Synopsys

Early SoC Dynamic Power Analysis Figure 1
The relentless pursuit for maximizing performance in semiconductor development is now matched by the crucial need to minimize energy consumption.

Traditional simulation-based power analysis methods face insurmountable challenges to accurately capture complex designs activities in real-world scenarios. As the scale… Read More

Webinar: High-Fidelity and Numerically Robust Modeling of Wide-Bandgap Power MOSFETs with Saber

Webinar: High-Fidelity and Numerically Robust Modeling of Wide-Bandgap Power MOSFETs with Saber
by Admin on 04-12-2024 at 1:47 pm

The adoption of wide-bandgap power MOSFETs (SiC and GaN) is growing in power electronic applications for consumer electronics, automotive, and renewable energy.

Successful implementation of simulation in system design requires high-fidelity, numerically robust, and compact power MOSFET models.

The Saber circuit simulation

… Read More
Posted on

Synopsys Design IP for Modern SoCs and Multi-Die Systems

Synopsys Design IP for Modern SoCs and Multi-Die Systems
by Kalar Rajendiran on 04-11-2024 at 10:00 am
Categories: AI, EDA, IP, Security, Synopsys

Synopsys IP Scale, a Sustainable Advantage

Semiconductor intellectual property (IP) plays a critical role in modern system-on-chip (SoC) designs. That’s not surprising given that modern SoCs are highly complex designs that leverage already proven building blocks such as processors, interfaces, foundational IP, on-chip bus fabrics, security IP, and others. This… Read More

Webinar: Unlocking Next-Gen Debugging: Synopsys Verdi and Euclide IDE Integration

Webinar: Unlocking Next-Gen Debugging: Synopsys Verdi and Euclide IDE Integration
by Admin on 04-08-2024 at 2:02 pm

Join us for an insightful presentation into the integration of Synopsys Verdi® and Euclide IDE, revolutionizing the debugging landscape for hardware designers. In this session, we’ll delve into next-generation Verdi’s integration with Euclide IDE, a cutting-edge integrated development environment. Discover how Euclide

… Read More