IP has always been a hot topic on SemiWiki with quite a bit of our readers doing the “make versus buy” analysis. SerDes is one of the more difficult “makes” so it is mostly a “buy” analysis made by networking class ASIC architects and a handful of other applications that demand high performance and throughput. Based on the recent traffic… Read More
Tag: semiwiki
AI and the Domain Specific Architecture
Last month I attended the 2018 U.S. Executive Forum where Wally Rhines was one of the keynotes. I was also lucky enough to have lunch with Wally afterwards and talk about his presentation in more detail and he sent me his slides which are attached to the end of this blog.
The nice thing about Wally’s presentations is that they are not … Read More
Crossfire Baseline Checks for Clean IP at TSMC OIP
IP must be properly qualified before attempting to use them in any IC design flow. One cannot wait to catch issues further down the chip design cycle. Waiting for issues to appear during design verification poses extremely high risks, including schedule slippage. For example, connection errors in transistor bulk terminals where… Read More
Retro-uC: on a road to low-cost, (ridiculously) low-volume ASICs ?
I’m a long time reader of SemiWiki; almost from the start. I’ve sometimes been a passionate commenter but as some of you may have noticed my activity lately on the forum was lower. One of the reasons is a project I am working on and I feel honoured I was invited to present the background here on SemiWiki.
I am currently working… Read More
What the world should not learn from Silicon Valley
Learn all you can from the entrepreneurs of Silicon Valley but don’t become like them. This was my advice to a group of 91 Indian students who are visiting here on a program sponsored by Rajasthan Chief Minister Vasundhara Raje. In a talk I gave this weekend, I encouraged them to take home the Valley’s optimism and culture of openness… Read More
Turnkey 2.5D HBM2 Custom SoC SiP Solution for Deep Learning and Networking Applications
Before we jump into the specifics, let us understand what’s driving custom solutions in the high performance computing and networking space. It’s the growing demand for core capacity and greater performance, which is due to the increase in the level of parallelism and multitasking required to handle the enormous amount of data… Read More
Accelerating Design and Manufacturing at the 25th Annual IEEE Electronic Design Process Symposium
25th annual IEEE Electronic Design Process Symposium
Accelerating Design and Manufacturing
September 13 & 14, 2018, SEMI, 673 S. Milpitas Blvd, Milpitas, CA 95035
This year marks a milestone in EDPS’s history as it turns 25. The event will be held at SEMI’s new headquarter facility and will provide a forum for EDA, foundry … Read More
Unhackable Product Claims are a Fiasco Waiting to Happen
Those who think that that technology can be made ‘unhackable’, don’t comprehend the overall challenges and likely don’t understand what ‘hacked’ means.
Trust is the currency of security. We all want our technology to be dependable, easy to use, and secure. It is important to understand both the benefits… Read More
The Ever-Changing ASIC Business
The cell-based ASIC business that we know today was born in the early 1980s and was pioneered by companies like LSI Logic and VLSI Technology. Some of this history is covered in Chapter 2 of our book, “Fabless: The Transformation of the Semiconductor Industry”. The ASIC business truly changed the world. Prior to this revolution,… Read More
Improving Yield and Reliability with In-Chip Monitoring, there’s an IP for that
There’s an old maxim that you can only improve what you measure, so quality experts have been talking about this concept for decades and our semiconductor industry has been the recipient of such practices to such an extent that we can now buy consumer products that include chips with over 5 billion transistors in them. You’ve… Read More