Intel Diversity Semiconductors

Intel Diversity Semiconductors
by Daniel Nenni on 11-12-2018 at 7:00 am

Growing up in a military family, mostly in California, I would consider my cultural diversity life experience to be more than most. I remember in the 1960s some older folks were chattering about a colored family moving into our neighborhood and they had a son my age. Imagine my excitement as a child in having a multicolored friend!… Read More


Is ARM TechCon Really Worth it?

Is ARM TechCon Really Worth it?
by Daniel Nenni on 11-05-2018 at 6:00 am

The ARM TechCon organizers are asking me what I thought of this year’s conference so here it goes. As you know I am a big fan of ARM TechCon and feel it is one of the better conferences for SoC design. This year however I noticed a big change in demographics. Maybe the location change had something to do with it but I definitely saw different… Read More


Playing the Long Game with 56G SerDes

Playing the Long Game with 56G SerDes
by Daniel Nenni on 11-02-2018 at 12:00 pm

IP has always been a hot topic on SemiWiki with quite a bit of our readers doing the “make versus buy” analysis. SerDes is one of the more difficult “makes” so it is mostly a “buy” analysis made by networking class ASIC architects and a handful of other applications that demand high performance and throughput. Based on the recent traffic… Read More


AI and the Domain Specific Architecture

AI and the Domain Specific Architecture
by Daniel Nenni on 10-03-2018 at 7:00 am

Last month I attended the 2018 U.S. Executive Forum where Wally Rhines was one of the keynotes. I was also lucky enough to have lunch with Wally afterwards and talk about his presentation in more detail and he sent me his slides which are attached to the end of this blog.

The nice thing about Wally’s presentations is that they are not … Read More


Crossfire Baseline Checks for Clean IP at TSMC OIP

Crossfire Baseline Checks for Clean IP at TSMC OIP
by Daniel Nenni on 09-26-2018 at 12:00 pm

IP must be properly qualified before attempting to use them in any IC design flow. One cannot wait to catch issues further down the chip design cycle. Waiting for issues to appear during design verification poses extremely high risks, including schedule slippage. For example, connection errors in transistor bulk terminals where… Read More


Retro-uC: on a road to low-cost, (ridiculously) low-volume ASICs ?

Retro-uC: on a road to low-cost, (ridiculously) low-volume ASICs ?
by Staf_Verhaegen on 09-25-2018 at 7:00 am

I’m a long time reader of SemiWiki; almost from the start. I’ve sometimes been a passionate commenter but as some of you may have noticed my activity lately on the forum was lower. One of the reasons is a project I am working on and I feel honoured I was invited to present the background here on SemiWiki.

I am currently working… Read More


What the world should not learn from Silicon Valley

What the world should not learn from Silicon Valley
by Vivek Wadhwa on 09-11-2018 at 12:00 pm

Learn all you can from the entrepreneurs of Silicon Valley but don’t become like them. This was my advice to a group of 91 Indian students who are visiting here on a program sponsored by Rajasthan Chief Minister Vasundhara Raje. In a talk I gave this weekend, I encouraged them to take home the Valley’s optimism and culture of openness… Read More


Turnkey 2.5D HBM2 Custom SoC SiP Solution for Deep Learning and Networking Applications

Turnkey 2.5D HBM2 Custom SoC SiP Solution for Deep Learning and Networking Applications
by Daniel Nenni on 09-07-2018 at 7:00 am

Before we jump into the specifics, let us understand what’s driving custom solutions in the high performance computing and networking space. It’s the growing demand for core capacity and greater performance, which is due to the increase in the level of parallelism and multitasking required to handle the enormous amount of data… Read More


Accelerating Design and Manufacturing at the 25th Annual IEEE Electronic Design Process Symposium

Accelerating Design and Manufacturing at the 25th Annual IEEE Electronic Design Process Symposium
by Camille Kokozaki on 09-05-2018 at 12:00 pm

25th annual IEEE Electronic Design Process Symposium
Accelerating Design and Manufacturing
September 13 & 14, 2018, SEMI, 673 S. Milpitas Blvd, Milpitas, CA 95035

This year marks a milestone in EDPS’s history as it turns 25. The event will be held at SEMI’s new headquarter facility and will provide a forum for EDA, foundry … Read More


Unhackable Product Claims are a Fiasco Waiting to Happen

Unhackable Product Claims are a Fiasco Waiting to Happen
by Matthew Rosenquist on 09-05-2018 at 7:00 am

Those who think that that technology can be made ‘unhackable’, don’t comprehend the overall challenges and likely don’t understand what ‘hacked’ means.

Trust is the currency of security. We all want our technology to be dependable, easy to use, and secure. It is important to understand both the benefits
Read More