Cycling, Semiconductors and CES 2015

Cycling, Semiconductors and CES 2015
by Daniel Payne on 01-06-2015 at 10:00 pm

I’m an avid cyclist that rode some 6,744.3 miles in 2014, according to www.strava.com, a free web site and popular app for road bikers like me. At CES this week I’ve read about many creative devices and apps to make your cycling experience better, so here’s my take on all of it.… Read More


Make Semiconductor IP Reuse Successful?

Make Semiconductor IP Reuse Successful?
by Daniel Nenni on 11-18-2014 at 3:00 pm

As I have mentioned before, Apple has changed the way we live on many different levels (iPod, iTunes, iPhone, iPad, etc…) and the Apple Ax SoC series is no different. You have to ask yourself how is Apple able to churn out a new industry leading SoC EVERY year? I can assure you design reuse is a big part of that answer.

One of the companies… Read More


Who is Using Samsung 14nm?

Who is Using Samsung 14nm?
by Daniel Nenni on 11-09-2014 at 7:00 am

As I have mentioned before, there are very few secrets in Silicon Valley. Just last week I was minding my own business at a Starbucks when I overheard two engineers complaining about Samsung 14nm shuttles being delayed. They had badges on but I won’t out them because it could have easily been any of the fabless companies in Silicon … Read More


What does the Ford Mustang and Intel’s Gordon Moore Have in Common with Local Motors?

What does the Ford Mustang and Intel’s Gordon Moore Have in Common with Local Motors?
by Charles DiLisio on 11-06-2014 at 11:00 pm

1964 Vision, Volume and Moore’s Law

The 1964 New York World’s Fair saw Lee Iacocca, then a young 40 year old General Manager, introduce a car that inspired “total performance” and was for a “young America out to have a good time.” This young America would become the baby boomer generation. The Mustang was revolutionary in its affordability,… Read More


GlobalFoundries and IBM

GlobalFoundries and IBM
by Paul McLellan on 10-19-2014 at 9:12 pm

So it’s true. IBM is selling its semiconductor division to GlobalFoundries. Actually, selling is a sort of euphemism for paying them $1.5B to take it off their hands. At least according to Bloomberg. There have been rumors for weeks that IBM wanted to pay $1B to get rid of the division, but GF wanted $2B. Looks like they split… Read More


Is Number of Signoff Corners an Issue?

Is Number of Signoff Corners an Issue?
by Daniel Nenni on 09-22-2014 at 12:00 am

Semiconductor companies continue to use the traditional corner-based signoff approach that has been developed more than 40+ years ago and has since remained mainly unchanged as an industry paradigm. Initially it had 2 corners, namely Worst Case (WC) and Best Case (BC) with the maximum and minimum cell delay respectively. Note… Read More


GlobalFoundries on the Road

GlobalFoundries on the Road
by Paul McLellan on 09-17-2014 at 5:12 pm

Every year in the fall GlobalFoundries has a series of technical seminars they take on the road around the US. This year it kicks off on Tuesday, October 21 at the Doubletree Hotel in San Jose. Two days later it is at Dana Point (southern CA) and on the 30th it goes to Austin (you don’t need me to tell you where Austin is, I’m… Read More


EDA Plus ARM Equals Big Views!

EDA Plus ARM Equals Big Views!
by Daniel Nenni on 09-07-2014 at 9:00 am

In looking at the SemiWiki analytics, one of the top search terms that brings traffic to our site is ARM, just about anything ARM. In fact, that’s what the next SemiWiki book will be about. Yes, ARM is that interesting. While EDA is also one of our top search terms, EDA+ARM will get the most views, absolutely. And let’s face it, bloggers… Read More


How to detect weak nodes in a power-off analog circuit?

How to detect weak nodes in a power-off analog circuit?
by Jean-Francois Debroux on 09-01-2014 at 4:00 pm

Most analog cells have a power off mode intended to reduce power consumption. In this mode, all the circuit branches between the supply lines are set in a high impedance mode by driving MOS gates to a blocking voltage. This is a somewhat similar situation to that in tri-state digital circuits.

When a branch is set in that high impedance… Read More


Do you check your circuit DC stability?

Do you check your circuit DC stability?
by Jean-Francois Debroux on 08-26-2014 at 8:00 pm

Most analog designers are aware of loops stability. In most cases, stability is understood as AC stability, the goal is ensuring enough phase (gain) margin so as to avoid the loop to enter oscillation. But prior to studying AC stability, DC stability should be questioned. What is that DC stability only few people think of?… Read More