During a recent LinkedIn webcast, Dr. Ian Cutress, Chief Analyst at More than Moore and Host at TechTechPotato, and Priyank Shukla, Principal Product Manager at Synopsys, shared their thoughts regarding the industry drivers, design considerations, and critical advancements in compute interconnects enabling data center… Read More
Chiplets have simplified one area of design but opened pandora’s box on another front. The simulation complexity of each chiplet is lower but now the chiplet-to-chiplet interconnect has become complex. Folks are experimenting with different interconnect protocols, variations of UCIe, modifying UCIe settings, interface… Read More
As the premier high-speed communications and system design conference, DesignCon 2023 offered deep insights from various experts on a number of technical topics. In the area of high-speed communications, PCIe has a played a crucial role over the years in supporting increasingly higher communications speed with every new revision.… Read More
A comprehensive report from the US Department of Energy (DOE), “Semiconductor Supply Chain Deep Dive Assessment” (February 2022) calls for a 1000X energy efficiency improvement that is required to maintain future compute requirement needs given a finite amount of world energy production. Energy efficiency is at the top of … Read More
Let’s face it. Standards aren’t always exciting, and the process of ratifying new versions can be time-consuming and tedious. Regardless, we all know standards are the glue that bind many ecosystems and without them the technology world would be good measure more chaotic. Standards come in many versions, with various amounts… Read More
We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More
PCIe, or peripheral component interconnect express, is a very popular high-speed serial computer expansion bus standard. The width and speed the standard supports essentially defines the throughput for high-performance computing (HPC) applications. The newest version, PCIe 6.0 promises to double the bandwidth that the… Read More
PCI-SIG has held to doubling PCIe’s data rate with each revision of the specification. The consortium of 800 companies, with its board consisting of Agilent, AMD, Dell, HP, Intel, Synopsys, NVIDIA, and Qualcomm, is continuing this trend with the PCIe 6.0 specification which calls for a transfer rate of 64 GT/s. PCI-SIG released… Read More
What do genome sequencing, engineering modeling and simulation, and big data analytics have in common? They’re all bandwidth-hungry applications with complex data workloads. High-performance computing (HPC) systems deliver the parallel processing capabilities to generate detailed and valuable insights from these applications.
