The 20th Annual Device Packaging Conference (DPC 2024)

The 20th Annual Device Packaging Conference (DPC 2024)
by Admin on 09-25-2023 at 4:38 pm

The 20th Annual Device Packaging Conference (DPC 2024) will be held at the WeKoPa Resort and Conference Center, from March 18-21, 2024. It is an international event organized by the International Microelectronics Assembly and Packaging Society (IMAPS).

The conference is a major forum for the exchange of knowledge and provides… Read More


Webinar: Multiphysics Solutions for the Packaging Industry

Webinar: Multiphysics Solutions for the Packaging Industry
by Admin on 05-11-2023 at 3:42 pm

Food Processing and Packaging Industry Webinar Series

Optimize Processes and Operational Efficiency

The food and packaging industry faces numerous challenges. Companies need to maintain a competitive edge, continuously innovate to meet consumer demands, and ensure high product quality, while maintaining cost efficiency.… Read More


19th Annual Device Packaging Conference (DPC 2023)

19th Annual Device Packaging Conference (DPC 2023)
by Admin on 03-09-2023 at 4:48 am

The most comprehensive event this spring for microelectronics assembly & advanced packaging returns to Fountain Hills, Arizona.  The 19th Annual Device Packaging Conference (DPC 2023) will be held March 13-16, 2023, at the WeKoPa Conference Center. This esteemed event brings together industry engineers, researchers… Read More


IEDM 2022 – Ann Kelleher of Intel – Plenary Talk

IEDM 2022 – Ann Kelleher of Intel – Plenary Talk
by Scotten Jones on 12-06-2022 at 10:00 am

Ann 2022 IEDM Plenary Dec. 5 Roadmap Slide

Ann Kelleher is Intel’s Executive Vice President, General Manager, Technology Development, and she gave the first plenary talk to kick off the 2022 IEDM, “Celebrating 75 Years of the Transistor A Look at the Evolution of Moore’s Law Innovation”. I am generally not a fan of plenary talks because I think they are often too broad and… Read More


Mentor unpacks LVS and LVL issues around advanced packaging

Mentor unpacks LVS and LVL issues around advanced packaging
by Tom Simon on 11-26-2019 at 6:00 am

Innovations in packaging have played an important role in improving system performance and area utilization. Advances like 2.5D interposers and fan-out wafer-level packaging (FOWLP) have allowed mixed dies to be used in a single package and have dramatically reduced the number of connections that need to go all the way to the… Read More


Design for Fanout Packaging

Design for Fanout Packaging
by Bernard Murphy on 12-12-2016 at 12:00 pm

In constant pursuit of improved performance, power and cost, chip and system designers always want to integrate more functions together because this minimizes inter-device loads (affecting performance and power) and bill of materials on the board (affecting cost). However it generally isn’t possible to integrate … Read More


3DIC in Burlingame

3DIC in Burlingame
by Paul McLellan on 12-01-2014 at 7:00 am

Every year in December is what I think of as the main 3D IC conference where you can get up to speed on all the latest. Officially it is called 3D Architectures for Semiconductor and Packaging or 3D ASIP. It is held in the Hyatt Regency in Burlingame (the one right by 101 near the airport). This year it is from December 10-12th.

The first… Read More


3DIC, the World Goes to…Burlingame

3DIC, the World Goes to…Burlingame
by Paul McLellan on 10-23-2013 at 2:09 pm

For the tenth year, the big 3DIC conference takes place in the Hyatt Regency at Burlingame (just south of San Francisco Airport). Officially it is 3D Architectures for Semiconductor Integration and Packaging or ASIP. This year there have already been some significant 3D announcements: TSMC’s 3D program, and Micron’s… Read More