Dan is joined by Dr. Tahir Ghani, Intel senior fellow and director of process pathfinding in Intel’s Technology Research Group. Tahir has a 30-year career at Intel working on many innovations, including strained silicon, high-K metal gate devices, FinFETs, RibbonFETs, and backside power delivery (BSPD), among others. He has… Read More
A friend of SemiWiki published an article on Moore’s Law in IEEE that I think is worth reading:
The topic of Moore’s Law is of paramount importance, reaching almost the entire field of electronics (and the semiconductor industry). In the course of six decades, for the first… Read More
The demand for high-performance and sustainable computing and networking silicon for AI has undoubtedly increased R&D dollars and the pace of innovation in semiconductor technology. With Moore’s Law slowing down at the chip level, there is a desire to pack as many chiplets as possible inside ASIC packages and get … Read More
Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something… Read More
Despite murky goals and moving targets, the recent CHIPS Act sets the stage for long term government incentives.
Authored by Jo Levy and Kaden Chaung
On April 25, 2024, the U.S. Department of Commerce announced the fourth, and most likely final, grant under the current U.S. CHIPS Act for leading-edge semiconductor manufacturing.… Read More
– High NA EUV’s coming out party – “Dawn” of the Angstrom Era
– Well attended, positive vibes, not much new but good progress
– Concerns about Samsung slowing spend while Intel accelerates
– KLA reticle inspection quandary – Risky business in China
If we look at the semiconductor industry expansion during the last 25 years, adoption of design IP in every application appears to be one of the major factors of success, with silicon technology incredible development by a x100 factor, from 250nm in 2018 to 3nm (if not 2nm) in 2023. We foresee the move to chiplet-based architecture… Read More
Dan is joined by Ritesh Jain. Ritesh is the senior vice president of engineering and operations for Lightmatter. Prior to joining Lightmatter, Ritesh was a vice president in Intel’s Data Center and AI group where he directed the hardware development across silicon packaging, power integrity, signal integrity, mechanical &… Read More
Jean-Marie Brunet is Vice President and General Manager of Siemens Hardware-Assisted Verification. He and I spoke recently about how different his hardware group is from the rest of the software-centric EDA product space and why a hardware-oriented EDA vendor like Siemens fully understands the challenges of the chip design… Read More
