Today an SoC cannot be without multiple IP blocks integrated together in the most optimal manner. In such an environment, it’s natural that interoperability and configurability of an IP get prime considerations to achieve the best PPA (Power, Performance and Area) for the SoC containing that IP. While PPA is a basic criterion … Read More
Sunday 8, March 2015. D-day minus one before the MIPI Alliance Face to Face meeting, starting in Seattle on Monday 9[SUP]th[/SUP] for five days. MIPI members are joining from all around the world to attend this one week meeting. If you take a look at www.mipi.org you will see the names of the 263 members from MIPI. A strong ecosystem… Read More
Today, Smartphones and mobile devices have become center of innovation with multiple functions getting into them. Considering the audio or voice application, there can be multi-way conferencing, video chat, complete audio/video streaming, gaming, voice triggering and recognition,… you name an application, and it will … Read More
With growing SoC size, complexity, software and hardware content in it and shrinking time-to-market, the SoC design completion in time has become increasingly dependent on IP which need to be sourced (internally or externally), customized according to the design need and integrated together into the SoC. While IP providers… Read More
MIPI SoundWire specification will be integrated into mobiles systems, like smartphone or media tablet. In fact some of the well-known chip makers have already decided to integrate MIPI SoundWire into their last application processor release. MIPI SoundWire is also the type of specification which could be used in many other … Read More
Whoever has said that history never repeats itself should read this recent PR from AMD! The news can be summarized in three points:
The set of MIPI PHY specifications has enlarged during last night, as theMIPI Alliance has introduced the new C-PHY spec on September 17th, a physical layer interface for camera and display applications. “The MIPI C-PHY specification was developed to reduce the interface signaling rate to enable a wide range of high-performance… Read More
If your company develops Design IP to support well-known protocols like USB, PCIe, HDMI, DDRn memory controller, MIPI specification (and more), it’s crucial to know your competition, the market size by segment, and even more important the market potential by segment. The latest can be obtained by the Compound Annual Growth Rate… Read More
… in 2019. At that time, the total Interface IP market is expected to weight between $900 million and $1 billion. If we want to understand this IP market segment dynamics, we have to look at protocol based products like USB (from USB 1.0 defined in 1996 at 12 Mbit/s to USB 3.1 supporting 10 Gbps data rate) or PCI Express (from PCIe gen-1… Read More
The set of MIPI specifications has severely enlarged during the past year. This is a positive point, as the large set of specifications induces a wider choice, and a chip maker can decide to implement a complex specification to differentiate with competitors, or select a specification just tailored to support a basic architecture… Read More
