As the semiconductor design community is seeing higher and higher levels of abstraction with standard IPs and other complex, customized IPs and sub-systems integrated together at the system level, sooner than later we will find SoCs to be just assemblies of numerous IPs selected off-the-self according to the design needs and… Read More
Every since Synopsys dominated the logic synthesis market in the 1980’s we’ve had something called HLS – High Level Synthesis, meaning something higher than what Design Compiler can understand as input. At DACthis year I met with Mark Milligan of Calypto to get an update on what’s new with HLS. I first… Read More
I love God, my wife, kids, and FPGA boards. I know I am not alone, there are other nerds out there, don’t be shy. Friday my “Kintex® UltraScale™ FPGA KCU105 Evaluation Kit” came in. Think about this, this is real 20nm Xilinx FPGA hardware that really works. Below is a nice picture of all the swizzles the board has.
I believe this is the … Read More
Can I ask you a personal question dear reader? It is only fair, you know so much about me and all, so here goes… Why are you still hand coding you’re FPGA design? Surely you are not hand coding interfaces, like PCie, SRIO, DDR, GbE, JESD204B, HMC etc… Correct? OK, why then are you still hand coding the guts of the world’s best, super-duper… Read More
Xilinx’s Zynq SoC is the best selling FPGA of all time. Zynq has brought together, at first an uncomfortable but necessary mix of software and hardware engineers. Two very different but special kind of people. Me, I’m of the hardware persuasion. Zynq is the start of the much needed open FPGA community. This will drive down the price… Read More
At DVCon today I talked to Sanjiv Kaul, the CEO of Calypto. Just as a reminder, Calypto have 3 products, SLEC (sequential logical equivalence checking, also called sequential formal verification), PowerPro (sequential RTL level power reduction) and Catapult High Level Synthesis (that they took over from Mentor in 2011 in a complicated… Read More
Last week, after learning from the press releaseof Carbonabout its rocking sustained growth with record-breaking revenue and a thumping 46% increase in bookings, I was interested to know some more details about what drives Carbon to such an amazing performance in an EDA market that is generally prone to growth of a few percentage… Read More
I have never done this before, wished a company happy birthday. So here goes, Happy Birthday Xilinx! How does it feel to be 30? Looking good eh? Signing up for AARP? My family and I just sang and had cake and ice cream. They did look at me like I was nuts when I set a place at the table for a Xilinx FPGA. In all seriousness, over the years Xilinx… Read More
Cadence today announced that it is acquiring Forte Design Systems. Forte was the earliest of the high-level synthesis (HLS) companies. There were earlier products. Synopsys had Behavioral Compiler and Cadence had a product whose name I forget (Visual Architect?), but both products were too early and were canceled. Cadence … Read More
Something in all the Xilinx chatter of UltraScale 20nm, 16nm, having massive amounts of Gigabit transceivers, DSP blocks, RAM, HLS, Rapid Design Closure gets lost… and that is Xilinx’s ability for Mixed Signals. I do not mean when you are talking with the wife (Remember Listen!), but a wonderful block that lives within… Read More
