Synopsys just delivered second quarter 2012 results with improved revenue on a year-over-year basis. Unfortunately operating expenses are said to be out of control. I’m not a stock guy so for more financial information and analysis try the Motley Fool article HERE.
The interesting thing to note is that Synopsys still has a pile… Read More
Rather than fly to Southern California this week I decided to drive. Airport parking and security, flying to Irvine and renting a car, driving to San Diego and back to Irvine, then flying home is just too much. Call it Porsche therapy, I would rather drive. On the way home I will take the scenic 101 and enjoy the ocean views.
First stop… Read More
Since around the posting of my prior blog [Chip in the Clouds – “Gathering”] to now many events have taken place. Facebook announced its intent to acquire Instagram for $1B in cash and stock, completed its initial public offering, announced an Instagram competitive product by releasing “Facebook Camera” … Read More
Standards have been proven to reduce cost of operations, drive greater process efficiencies and offer greater opportunities for start-up companies to infuse fresh technology in the design and manufacturing of IC’s. Si2 standards have been targeted to resolve “pinch-points” in the overall semiconductor supply chain… Read More
Apache is one of the brightest stars in the EDA universe. Paul McLellan has done a nice job covering them before and after the Ansys acquisition. Check out the Apache SemiWiki landing page HERE. The Apache wikis are also very well done and it has been a pleasure working with the Apache marketing team. Expect more innovative things … Read More
Automation for digital design has been mainstream for a couple of decades but place and route for analog is still in its infancy. Many attempts have been made over the years to automate analog design in one way and another, the bodies are piled up on the hillside. Much analog design is still largely done with custom layout and circuit… Read More
EDAC has a series of seminars for emerging companies with Jim Hogan. Jim has been in EDA since, like, forever. First at National, then at Cadence, then at Artisan (now ARM) and then as an investor first at Telos (Cadence’s VC arm) and more recently on his own at Vista Ventures. He has been involved with many EDA and semiconductor… Read More
At EDPS in Monterey, Tom Spyrou of AMD talked about their compute environment in the context of parallel algorithms. I discovered that they are a big user of RTDA’s FlowTracer so I talked to Philip Steinke at AMD about how they used it.
He said that they largely use it as described in The Art of Flows as a graphical distributed … Read More
Before going to Munich to attend to CDN-Live, I took a look at the agenda to figure out which presentations to attend, and I must say it was not so easy to choose: CDN Live agendais dense, with multiple tracks running in parallel (Custom Design, Digital Implementations, Design IP, Functional Verifications and Verification IP, PCB… Read More
CPAK sounds like something politicians create to collect money, but in fact it is a Carbon Performance Analysis Kit. It consists of models, reference platform, initialization software (for bare metal CPAKs) or OS binary (for Linux and Android based CPAKs). They are (or will soon be) available for ARM Cortex A9, ARM Cortex A15 and… Read More
