Mixed-Signal Methodology Guide: Design Management

Mixed-Signal Methodology Guide: Design Management
by Daniel Payne on 12-04-2012 at 11:04 am

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I reviewed the book Mixed-Signal Methodology Guidein August of this year published by Cadence, and decided to follow up with one of the authors, Michael Henrie from ClioSoft, to learn more about the importance of Design Management for AMS. Michael is a Software Engineering Manager at ClioSoft and has worked at Zarlink Semi, Legerity,… Read More


Arteris answer to Sonics: should compare actual NoC (in Silicon proven SoC) performance, instead of potential, unproven NoC performances!

Arteris answer to Sonics: should compare actual NoC (in Silicon proven SoC) performance, instead of potential, unproven NoC performances!
by Eric Esteve on 12-02-2012 at 5:06 am

It seems that Ateris vs. Sonics war, initiated by Sonics in 2010 on the legal battle field, is now continuing on the marketing field, as far as I am concerned, I prefer the latter, as I am an engineer and not a lawyer, and I must say that playing in the marketing allow both companies to extract the most attractive features of their products.… Read More


Variation-Aware Design: A Hands-on Field Guide

Variation-Aware Design: A Hands-on Field Guide
by Daniel Payne on 12-01-2012 at 2:57 pm

IC designers using advanced nodes are acutely aware of how variation effects in the silicon itself are causing increased analysis and design efforts in order to yield chips at acceptable levels. Four authors from Solidoare so passionate about this topic that they combined their years of experience into a book that I had a chance… Read More


Sequential Power Optimization

Sequential Power Optimization
by Paul McLellan on 11-29-2012 at 8:44 pm

Calypto has an interesting webinar coming up about Minimizing RTL Power Through Sequential Analysis. It is next Tuesday December 4th at 11am.

Insert standard paragraph about how power is the new timing, everyone worries about power, battery life in smartphones, half-empty datacenters.

You probably already know about clock… Read More


GLOBALFOUNDRIES and Mentor Develop Methods to Identify Critical Features in IC Designs

GLOBALFOUNDRIES and Mentor Develop Methods to Identify Critical Features in IC Designs
by glforte on 11-28-2012 at 3:00 pm

Since the beginning of the semiconductor industry, improving the rate of yield learning has been a critical factor in the success silicon manufacturing. Each fab has dedicated yield teams that look at the yield of wafers manufactured the previous day and attempt to find the root cause of any unexpected “excursions.” In earlier… Read More


ASIC Prototyping: Dini Group and Tektronix

ASIC Prototyping: Dini Group and Tektronix
by Daniel Payne on 11-25-2012 at 7:00 pm

Collaboration in EDA is nothing new, however you may not be aware of how the Dini Group and Tektronix have worked together on an FPGA prototyping platform to address issues like debugging with full visibility across an entire multi-FPGA design. At SemiWiki we’ve blogged a couple of times so far about the new debug approach… Read More


Dear Santa, please bring technology that brings us together

Dear Santa, please bring technology that brings us together
by Don Dingee on 11-23-2012 at 2:12 pm

Dear Santa,
It has been many years since I have written you. I was taught never to ask anyone for anything for myself, that it is a presumptuous and selfish thing to do, so this is not for me. I know you are busy filling the wish lists of children everywhere, but wanted to take a moment to ask for your help for everyone.… Read More


Internet of Things, My Bluetooth Headset

Internet of Things, My Bluetooth Headset
by Daniel Payne on 11-20-2012 at 8:42 pm

A catchy phrase used by bloggers and journalists these days is “Internet of Things“, or IoT if you prefer acronyms. All of this is made possible by EDA tools in the hands of SoC designers to create useful products like my Jawbone ICON bluetooth headset. Tonight I discovered that I could customize my bluetooth headset… Read More