Sunday Night – you have to network at the EDAC kick-off party.… Read More
Photo and Video Overview of DAC 2012
Tag: dac
Mike Muller’s ARM Keynote at DAC 2012
Mike Muller’s keynote focused on a lot of changes since the ARM1 was designed in 1983 when ARM the company did not exist and ARM was the next generation processor for Acorn Computer, which was really in the hobby market and had its first boost when they had a contract to design the BBC Microcomputer to go along with a computer literacy… Read More
Double Patterning Technology at DAC
David Abercrombie from Mentor Graphics met with me on Tuesday at DAC to provide an update on DPT – Double Patterning Technology, something new required for several layers starting at the 20nm node in order to get any IC yield. DPT is also part of Multiple-Patterning.… Read More
Shape-based IC Routing at DAC
IC place and route is a big challenge so we see many EDA companies creating tools. On Tuesday at DAC I met with Dave Noble of Pulsic to get an update.
Notes
Dave Noble, VP Operations (EDA since 2003), Sperry Univac since 1974
– had been an EDA distributor for Pulsic as well
More leads qualified on Monday than all days of last year … Read More
3D Thermal and Mechanical Stress for IC Packaging
3D has been a growing buzz word in IC design and packaging for several years now, so it’s refreshing to actually find an EDA vendor that has developed tools to help analyze something like 3D thermal and mechanical stress at DAC. … Read More
Analog Macromodels at DAC
I use social media 7 days a week and while at DAC I received a message from Herve Guegan on my LinkedIn account where he basically said, “Hey, go check out Asygn at DAC, they do analog macro models.”… Read More
What’s new with HSPICE at DAC?
One year ago I met with Hany Elhak of Synopsys to get an update on what was new with HSPICE in 2011, so this year at DAC Hany met me at the Synopsys booth for a quick update.
HSPICE has something called Precision Parallel so with 16 cores your IC circuit simulations will have about 10 x speed up compared to a single core.… Read More
Samsung, Synopsys, GLOBALFOUNDRIES and ARM at DAC
Tuesday morning at DAC I attended the Synopsys-hosted breakfast to hear from foundries and ARM about the challenges of designing and delivering silicon at the 32nm/28nm and 20nm nodes.
… Read MoreFast Monte Carlo from Infiniscale at DAC
Firas Mohamed, President and CEO (Ph.D.) of Infiniscale met with me on Monday at DAC to provide an overview of what EDA software they offer to IC designers at the transistor-level.
Vision – analog flow that Monte Carlo simulation is required, which is thousands of circuit simulations, however the higher the sigma the more… Read More
IC Layout Tools from Japan at DAC
Last Monday I met with Nobuto Ono, VP Business development at Jedat (Japan EDA Technologies) while attending the DAC conference.
The company started in Tokyo and is Ex Seiko Instruments, in 2004.
Main product – layout editor for IC (SX 9000). New system is ALpha SX in 2002. 2007 listed on JASDAQ market. Like Virtuoso tools,… Read More