I’m a user of many Samsung products as my family has Samsung Galaxy smart phones and my MacBook Pro uses Samsung SSD for storage, so at DAC I attended a breakfast panel with presenters from Samsung, Synopsys and Qualcomm. This was the second day of DAC and they served us breakfast, and with the big names on the panel the room was… Read More
Tag: #54dac
Emulation makes the What to See List
The analysts at Gary Smith EDA produce an annual What To See List for DAC and I quickly noticed that all three major EDA vendors were included on the list for the specific category of emulation. The big problem that emulation addresses is the ability to run in hardware an early version of your SoC so that software developers can get access… Read More
HLS update from Mentor about Catapult
I recall back in the late 1980’s when logic synthesis tools were first commercialized, at first they could read in a gate-level netlist from one foundry then output an optimized netlist back into the same foundry. Next, they could migrate your gate-level netlist from Vendor A over to Vendor B, giving design companies some… Read More
Designing at 7nm with ARM, MediaTek, Renesas, Cadence and TSMC
The bleeding edge of SoC design was on full display last month at DAC in Austin as I listened to a panel session where members talked about their specific experiences so far designing with the 7nm process node. Jim Hogan was the moderator and the panel quickly got into what their respective companies are doing with 7nm technology already.… Read More
ADAS and Vision from Cadence
A huge theme at #54DAC this year was all things automotive and in particular the phrase ADAS (Assisted Driver Assistance Systems), so I followed up with Raja Tabet a corporate VP of emerging technology at Cadence. We met on Monday in a press room where I quickly learned that Cadence has been serving the automotive industry for the … Read More
DAC 2017: How Oracle does Reliability Simulation when designing SPARC
Last week at #54DAC there was a talk by Michael Yu from the CAD group of Oracle who discussed how they designed their latest generation of SPARC chips, with an emphasis on the reliability simulations. The three features of the latest SPARC family of chips are:
- Security in silicon
- SQL in silicon
- World’s fastest microprocessor
New Concepts in Semiconductor IP Lifecycle Management
Right before #54DAC I participated in a webinar with Methodics on “New Concepts in Semiconductor IP Lifecycle Management” with Simon Butler, CEO of Methodics, Michael Munsey, Vice President of Business Development and Strategic Accounts, and Vishal Moondhra, Vice President of Applications. Thewebinar introduced… Read More
The Real Reason Siemens Bought Mentor!
The Siemens purchase of Mentor last year for a premium $4.5B was a bit of a shock to me as I have stated before. I had an inkling a Mentor acquisition was coming but Siemens was not on my list of suitors. The reviews have been mixed and the Siemens commitment to the IC EDA market has been questioned so I spent some time on this at #54DAC.
First… Read More
First Thoughts from #54DAC!
This was my 34[SUP]th[/SUP] DAC, yes 34. It is a shame blogging did not exist back then because I would have liked to have read thoughts from my eager young mind, or maybe not. The first thing that struck me this year is the great content. Before DAC I review the sessions I want to see and this year there were many more than I had time for. … Read More
TSMC @ #54DAC!
TSMC has been an ardent supporter of DAC for the last 18 years which has brought in the other foundries because, as the industry leader, wherever TSMC goes the other foundries naturally follow. The exception of course is Intel Custom Foundry because they march to the beat of a different drummer, if you know what I mean. The CoFluent… Read More