Expanding Intel’s Foundry Partnerships: A Critical Piece of IDM 2.0

One of the career Intel employees (33+ years) that Pat Gelsinger brought back is Stuart Pann. Stuart is now the Senior Vice President of the Intel Corporate Planning Group. He does not have direct foundry experience but he certainly knows Intel and Pat so it will be interesting to see where this goes.

Stuart recently penned an article on Intel’s foundry partnership strategy that is worth a look. The audience for this seems to be Wall Street but I found it interesting due to the opening question and what was not discussed:

Significant elements of these graphics products will be manufactured externally, using TSMC’s N6 and N5 process technologies. This is the basis of a question I hear frequently in my role as leader of the newly formed Corporate Planning Group – where one of our jobs is to manage the relationships with our external foundry partners.

No mention of N3 usage at all? I was certainly hoping for a little more transparency here. The TSMC N3 wafer agreement is historical in nature due to its size and product scope.

But yes Intel’s tile (chiplet) strategy makes outsourcing much easier which is a brilliant move. The low cost Chiplet strategy will enable many new wafer starts for the semiconductor industry so you can bet this technology will move forward quickly, absolutely.

I’m asked: Why do we use foundries for products instead of our internal factory network and how do we make that decision?

The historical answer is “due to acquisitions”. The updated answer of course is “due to the Intel manufacturing delays”.

Intel has been using external foundries for decades. In fact, Intel currently runs as much as 20 percent of its overall product volume at external foundries, and we are among the top customers of TSMC. Historically we have partnered with foundries to manufacture components such as Wi-Fi modules and chipsets or specific product lines such as Ethernet controllers. These products use mainstream process nodes to complement our internal leading-edge technologies.

The 20% he mentioned comes from Intel acquisitions that were already using TSMC. Most of which have been moved to Intel internal manufacturing (Altera for example) but some have stayed. Given Intel’s new semiconductor consolidation push that 20% should grow inorganically as well as organically.

External foundries are strategic partners and a key component of our IDM 2.0 model. While the majority of our products will continue to be made internally, expect to see tiles from external foundries playing a bigger part in our modular products in the coming years – including core compute functionality on advanced nodes to serve emerging workloads in client, data center and other areas.

I’m sure this claim can be “unpacked” (Intel’s favorite new sound bite) and justified with a public relations spin but I see no possibility that the majority of die inside Intel finished chips will be manufacture by Intel once the TSMC N3 based CPU/GPU products reach HVM.  50.00001% is technically a majority but even then I find it hard to believe. TSMC is already at 20% without chiplets and the N3 contract.

Either way I’m looking forward to hearing more from Stuart.

On a side note, Intel branded their new GPU products ARC. Clever name certainly but it does cause confusion with the Synpsys ARC processors that were acquired from Virage Logic 10+ years ago. Synopsys has invested a lot of time and money in ARC technology so I highly doubt this will end nicely. But remember Intel is Synopsys’s biggest customer so it may all be handled quietly.

Also read:

TSMC Wafer Wars! Intel versus Apple!

Highlights of the “Intel Accelerated” Roadmap Presentation

Intel Accelerated

 

Share this post via:

• 
• 
• 
•