Early SoC Dynamic Power Analysis Needs Hardware EmulationThe relentless pursuit for maximizing performance in semiconductor…Read More
Semidynamics Shakes Up Embedded World 2024 with All-In-One AI IP to Power Nextgen AI ChipsSemidynamics takes a non-traditional approach to design enablement.…Read More
Silicon Catalyst partners with Arm to launch the Arm Flexible Access for Startups Contest!Winner and Runner-up to receive the contest’s largest…Read More
Synopsys Design IP for Modern SoCs and Multi-Die SystemsSemiconductor intellectual property (IP) plays a critical role…Read More
In one of my favorite movies, Brad Pitt utters the only question that matters in baseball or technology management in the face of uncertainty: “Okay, good. What’s the problem?” Not surprisingly in that scene, as the question circles the table of experts used to doing things the old way, not a single one can answer it correctly in the… Read More
One of TSMC’s two big Silicon Valley events each year is the Open Innovation Platform (OIP) Forum. This year it is on Tuesday October 1st. It is in the San Jose Convention Center and starts at 9am (registration opens at 8am). Pre-registration to attend is now open here or click on the image to the right.
From 9.10 to 9.40 is the … Read More
At the ITC test conference in early September, Mentor made three announcements. ITC is a big event for Mentor’s test group, and where they usually roll out their new tools and capabilities. The indefatigable Steve Pateras was captured on film describing them.
I’ve summarize Mentor’s three announcements and added… Read More
The US Executive Forum hosted by the Global Semiconductor Alliance was held last night at the beautiful Rosewood Sand Hill Hotel in Menlo Park. We all have memorable events in our professional lives and this is one of mine, absolutely. The audience was filled with semiconductor executives from around the world who chatted freely… Read More
Yesterday was Dan Niles quarterly review that he does for GSA. As always he starts from the big picture of the world economy and works his way to a semiconductor forecast. The focus of this quarter was whether the world economy is strong enough for the US to “taper” and reduce the amount of quantitative easing (aka flooding… Read More
Today Micron announced that it is shipping 2GB Hybrid Memory Cube (HMC) samples. The HMC is actually 5 stacked die connected with through-silicon-vias (TSVs). The bottom die is a logic chip and is actually manufactured for Micron in an IBM 32nm process (and doesn’t have any TSVs). The other 4 die are 4Gb DRAM die manufactured… Read More
The legend of Intel being two process nodes ahead of the rest of the industry is quickly coming to an end. To come to terms with this you need to do an apple to apple comparison which is what I will do right here, right now.
First and foremost let’s compare SoC silicon delivery since SoCs are driving the semiconductor industry and will … Read More
This time it is between the suppliers of semiconductor manufacturing equipments. And they are among the top ranked global peers. Applied Materials Inc., holding the numero uno position in sales of chip manufacturing equipments in 2012, agreed to acquire Tokyo Electron Ltd, the third in that ranking. Gary Dickerson of Applied… Read More
Ashok Mehtahas designed processors at DEC and Intel, managed ASIC vendor relationships, verified networks SoCs, directed engineers at AMCC, and used SystemVerilog since it’s inception. He recently authored a book: SystemVerilog Assertions and Functional Coverage. The book is available in both hardcover and Kindle… Read More
You may say, “Why should I worry about synchronizer failures when I have never seen one fail in a product?” Perhaps you feel that the dual-rank synchronizer used by many designers makes your design safe. Furthermore, those chips that have occasional unexpected failures never show any forensic evidence of synchronizer failures.… Read More
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Huawei’s and SMIC’s Requirement for 5nm Production: Improving Multipatterning Productivity