The “in-person” portion of the Design Automation Conference (DAC) was recently held in San Francisco. (As several presenters were unable to attend, a “virtual” program is also available.) The presentations spanned a wide gamut – e.g., technical advanced in design automation algorithms; new features in commercial EDA tools; … Read More


Semicon West is Semicon Less
- Semicon West was Semicon Less- Less Customers & Vendor
- Everyone is busy as can be, maybe too busy to attend
- Those who were there, talk about supply chain issues & stress
- How long does the party last & where the money comes from?
Semicon West was Semicon Less….
We attended a “Hybrid” version of Semicon… Read More
PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions
We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More
DAC 2021 – Accellera Panel all about Functional Safety Standards
Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists… Read More
Intel Discusses Scaling Innovations at IEDM
Standard Cell Scaling
Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.
Figure 1 illustrates the dimensions of a standard cell.
Figure 1. Standard Cell Dimensions.
From figure 1 we can see that shrinking standard cell sizes requires… Read More
DAC 2021 – Joe Sawicki explains Digitalization
Monday at DAC this year started off on a very optimistic note as Joe Sawicki from Siemens EDA presented in the Pavilion on the topic of Digitalization, a frequent theme in the popular press because of the whole Work From Home transition that we’ve gone through during the pandemic. Several industries are benefiting from the… Read More
A Practical Approach to Better Thermal Analysis for Chip and Package
Thermal modeling has become a hot topic for designers of today’s high-speed circuits and complex packages. This has led to the adoption of better and more sophisticated thermal modeling tools and flows as exemplified in this presentation by Micron at the IDEAS Digital Forum. The presentation is titled “Thermal Aware Memory Controller… Read More
Edge Computing Paradigm
Edge computing is a model in which data, processing and applications are concentrated in devices at the network rather than existing almost entirely in the cloud.
Edge Computing is a paradigm that extends Cloud Computing and services to the of the network, similar to Cloud, Edge provides data, compute, storage, and application… Read More
Performance, Power and Area (PPA) Benefits Through Intelligent Clock Networks
One of the sessions at the Linley Fall Processor Conference 2021 was the SoC Design session. With a horizontal focus, it included presentations of interest to a variety of different market applications. The talk by Mo Faisal, CEO of Movellus, caught my attention as it promises to solve a chronic issue relating to synchronizing … Read More
Podcast EP52: A Preview of the Upcoming IEDM Meeting
Dan is joined by Srabanti Chowdhury, the publicity co-chair for IEDM, which will be an in-person conference December 11-15 at the Hilton San Francisco Union Square. Dan explores the topics to be discussed at the upcoming meeting and what they suggest about the future of semiconductors.
Srabanti Chowdhury is an associate … Read More
Intel’s Pearl Harbor Moment