ads mdx semiwiki building trust gen 800x100ai

Intel’s Investor Day – Nothing New

Intel’s Investor Day – Nothing New
by Doug O'Laughlin on 02-27-2022 at 6:00 am

https3A2F2Fbucketeer e05bbc84 baa3 437e 9518 adb32be77984.s3.amazonaws.com2Fpublic2Fimages2Fbe32664a cc3a 41e2 8898 d1a1ba57daf1 2400x1240

Intel’s big investor day was anything but big. The stock reacted poorly, down 5% on a day that was a widespread sell-off anyways.

I want to briefly summarize what matters for the stock. There was very little incremental news to the technology roadmap, and the financial outlook was underwhelming, to say the least.

The revenue guide… Read More


Podcast EP64: The real story behind Fairchild Semiconductor

Podcast EP64: The real story behind Fairchild Semiconductor
by Daniel Nenni on 02-25-2022 at 10:00 am

Dan is joined by John East, the former CEO of Actel. In the sixth episode of Semiconductor Insiders John explained the beginnings of Fairchild Semiconductor and the significance of the Traitorous Eight.

In this follow-up discussion, John recounts the rise and fall of Fairchild Semiconductor. This is a turbulent and significant … Read More


CEO Interview: Tamas Olaszi of Jade Design Automation

CEO Interview: Tamas Olaszi of Jade Design Automation
by Daniel Nenni on 02-25-2022 at 6:00 am

Tamas Olaszi

Why does the industry need another register management tool? This is a question that Tamas Olaszi, the founder of Jade Design Automation hears from time to time since Jade-DA brought Register Manager, their EDA tool, to market. So why?

There is a genuine answer to this question but first let me use this interview to give some helpful… Read More


Integrated 2D NoC vs a Soft Implemented 2D NoC

Integrated 2D NoC vs a Soft Implemented 2D NoC
by Kalar Rajendiran on 02-24-2022 at 10:00 am

Routing of cnv2d design using Speedster7t 2D NoC

We are living in the age of big data and the future is going to be even more data centric. Today’s major market drivers all have one thing in common: efficient management of data. Whether it is 5G, hyperscale computing, artificial intelligence, autonomous vehicles, or IoT, there is data creation, processing, transmission, and … Read More


Scalable Verification Solutions at Siemens EDA

Scalable Verification Solutions at Siemens EDA
by Daniel Nenni on 02-24-2022 at 6:00 am

Andy Meier 2

Lauro Rizzatti recently interviewed Andy Meier, product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy is a product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy has held positions in the electronics and high-tech fields during his 20-year career including: Sr.Read More


Working with the Unified Power Format

Working with the Unified Power Format
by Daniel Payne on 02-23-2022 at 10:00 am

UPF design flow min

The Accellera organization created the concept of a Unified Power Format (UPF) back in 2006, and by 2007 they shared version 1.0 so that chip designers would have a standard way to communicate the power intentions of IP blocks and full chips. By 2009 the IEEE received the Accellera donation on UPF , reviewed multiple drafts and published… Read More


Power Analysis in Advanced SoCs. A Siemens EDA Perspective

Power Analysis in Advanced SoCs. A Siemens EDA Perspective
by Bernard Murphy on 02-23-2022 at 6:00 am

Power verification methods min

The success of modern battery-powered products depends as much on useful operating time between charges as on functionality. FinFET process technologies overtook earlier planar CMOS in part because they significantly reduce leakage power. But they exacerbate dynamic power consumption thanks to increased pin capacitances.… Read More


The Clash Between 5G and Airline Safety

The Clash Between 5G and Airline Safety
by Tom Simon on 02-22-2022 at 10:00 am

5G and Airline Safety

For 5G to really deliver on its promise of high bandwidth and good coverage, it needs to use an RF band known as C-Band (3.7 to 4.4 GHz). This band is ideal because its frequency is high enough to offer 100MHz wide channels and also low enough that signal attenuation, especially in urban areas, is minimal.  In 2020 the FCC auctioned off… Read More


Six Essential Steps For Optimizing EDA Productivity

Six Essential Steps For Optimizing EDA Productivity
by Kalar Rajendiran on 02-22-2022 at 6:00 am

Semiconductor Design Phases and Needs

Altair® Accelerator™ was the focus of a couple of SemiWiki posts last year. The most recent post covers the enterprise-grade job scheduler’s latest updates and an earlier one discussed its patented Rapid Scaling feature. You can refer to these blogs here. While these posts provide insight into how Accelerator can help increase… Read More


Automated Documentation of Space-Borne FPGA Designs

Automated Documentation of Space-Borne FPGA Designs
by Daniel Nenni on 02-21-2022 at 10:00 am

Kepler Schem

Over the past three years, I’ve spoken frequently with Cristian Amitroaie, CEO and co-founder of AMIQ EDA, to understand how the company is helping engineers cope with the challenges of chip design and verification. With their broad customer base and many years of experience in the EDA business, the folks at AMIQ really seem to … Read More