S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
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-Strength in trailing tools offsets weak memory resulting in flat
-Order book very volatile but backlog surprisingly still grew
-Trailing edge VS Leading edge = 50/50 – Foundry/logic over 2/3
-Not nearly as bad as Lam but not as good as ASML
Applied Materials… Read More
Intel and TSMC make up two of the three leading edge logic companies. At IEDM held in December 2022, Intel presented a paper on 2D Materials and TSMC presented 6 papers. Clearly 2D materials are of great interest at least to two of the three leading edge logic companies. Before diving into the papers, some background context is needed.… Read More
Dan is joined by Frankwell Lin. Frank co-founded Andes Technology in 2005 and served as President from 2006. He became Chairman and CEO in 2021. Under his leadership, Andes is recognized as a top supplier of embedded CPU IP in the semiconductor industry.
Dan explores how Andes became such a strong supplier of RISC-V cores with Frank.… Read More
A physicist by training, Axel is used to the need for large-scale compute. He discovered over 30 years ago that scalability of processor performance was paramount for solving any computational problem. That necessitated a new paradigm in computer architecture. At Parimics, SSRLabs and Axiado he was able to show that new thinking… Read More
The first chiplets focused summit took place last month. So many accomplished speakers gave keynote talks on what direction should and would the Chiplets ecosystem evolution take. Corigine presented the keynote on what direction hardware emulation should and would evolve for speeding up chiplet- based designs. During a pre-conference… Read More
We looked at another paper on ML-based coverage acceleration back in April 2022. Here is a different angle from IBM. Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback… Read More
Earlier I blogged about IC and ASIC functional verification, so today it’s time to round that out with the state of FPGA functional verification. The Wilson Research Group has been compiling an FPGA report every two years since 2018, so this marks the third time they’ve focused on this design segment. At $5.8 billion… Read More
Often, AI inference brings to mind more complex applications hungry for more processing power. At the other end of the spectrum, applications like home appliances and doorbell cameras can offer limited AI-enabled features but must be narrowly scoped to keep costs to a minimum. New area-optimized AI inference technology from… Read More
A quick Google search for “2.5D 3D IC” returns 669,000 results, so it’s a popular topic for the semiconductor industry, and there are plenty of decisions to make, like whether to use an organic substrate or silicon interposer for interconnect of heterogenous semiconductor die. Design teams using 2.5D and … Read More
As the premier high-speed communications and system design conference, DesignCon 2023 offered deep insights from various experts on a number of technical topics. In the area of high-speed communications, PCIe has a played a crucial role over the years in supporting increasingly higher communications speed with every new revision.… Read More
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