Cadence Voltus includes full chip PDN model extraction and analysis. Cadence Sigrity include system level(SI and PI) analysis with Sigrity package and
board models. As a research and developer intern, you will work on Voltus/Sigrity integration projects.
- You need to have a solid foundation in chip model extraction and circuit simulation. Besides that, you need to have hands on experience in programming and computer science.
- Currently pursuing a Master’s or PhD degree in Electrical Engineering, Computer Science or related technical field.
- Experience with model extraction and SPICE circuit simulation.
- Experience with algorithms, data structures and complexity data processing, Familiarity with programming using C, C++.
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To view the job application please visit cadence.wd1.myworkdayjobs.com.