Semiwiki 400x100 1 final
WP_Term Object
(
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1314
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1314
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0
)

3D, The State of the State

3D, The State of the State
by Paul McLellan on 12-11-2014 at 8:00 am

I have been at the 3D ASIP conference that is held every year in Burlingame. It is far and away the best place to get a snapshot on what is going on in 3D (and 2.5D) IC design each year. One of the presentations was by the guys from Yole on where the industry is right now. Other presentations were on pathfinding, power reduction (did you know Jerry Frenkil likes Lone Star Beer?), building TSVs, planarity during assembly and much more.


In the past the conference has been all about how 3D is going to happen “real soon now” but each time a 3D design was announced it would turn out that when the teardown was done it didn’t use thru silicon vias (TSVs) or any true 3D technology at all. It would be another year before something happened. But this year things started to happen.

3D and 2.5D are still too expensive for most applications, but the ones that can take advantage of the benefits and sell them to their customers are moving. Don’t expect 3D chips to show up in your cell-phone any time soon but in routers, and servers and high-end stuff it is starting to move. Samsung did a study that showed that compared to package on package designs (like the current Apple Ax designs) package size was down, power was down and bandwidth was up insanely. Designs where those are valued make sense.

There are some pretty high profile 3D things happening. The earliest was the Xilinx high end FPGA but that ships in very low volume at very high prices so isn’t really generating enough learning to get prices down. Samsung has announced DDR4 3D DRAM DIMM modules. The Micron hybrid memory cube is about to start shipping in volume: 4 memory chips on top of a logic chip with all the control logic. SK Hynix and Samsung have also announced 3D memory products moving into high volume manufacturing.

Announced, but not shipping are that AMD (ATI) will use 3D stacked high bandwidth memory (HBM) on 20nm in 2Q next year. Nvidia will do the same in 2016. Intel has said they have the technology but haven’t announced anything but then they are Intel. Even at the lower end of the market Matrox has announced next generation GPU modules powered by AMD 3D stacks. If you want to be in graphics, get with the program.

There are other designs too. The common characteristic is that they are at the high end of the market so that although 3D is still expensive, it has higher performance/bandwidth and for those markets that need it the ends justifies the cost. I have no idea of the cost of Micron’s HMC but they admit it is a lot more than just buying the same amount of regular DRAM. But the performance is so much higher that if you are building high end servers or routers then you can justify it.

The big driver in SoC these days is mobile, but it is too cost-sensitive so nobody seems to expect 3D to appear there any time soon. Qualcomm are on record of saying that the costs of interposers are too high for now and given all the growth in mobile is in the low end that you shouldn’t expect to see it any time soon.

For really big chips the savings from 2.5D can be big. A couple of years ago I was at a 3D workshop where eSlilicon ran their cost model on the Xilinx parts and reckoned they were saving 80% by doing a 2.5D interposer with 4 small chips versus trying to run a maximum (reticle limit) sized die on an immature process.


So 2015 is the year of 3D. It is coming. Yes, only in high priced products for now, but as the learning from running in volume starts to percolate through the supply chain it will get more economical. There don’t seem to be any major technical problems (we know how to build TSVs, even though they will get better; we know how to attach and debond a backing material so that when we thin the die it is manageable; the stress issues with different thermal expansions seem manageable). The big issues seem to be to run a lot of volume and to decide who does what in the supply-chain.

IoT is a 3D market. They are not going to go to 16nm. They need sensors, RF, analog and digital in the same package at cheap cost. 3D is clearly the way that will eventually get there. Not next year, but eventually.


More articles by Paul McLellan…

Share this post via:

Comments

0 Replies to “3D, The State of the State”

You must register or log in to view/post comments.