EDPS Monterey. Agenda Now Available

For 20 years there has been the Electronic Design Process Symposium. It has been held each April and for the last few years at least has always been in Monterey at the Monterey Beach Resort. This year it is Thursday and Friday April 18th/19th.

The keynote on the first day is by Ivo Bolsens of Xilinx on The All-programmable SoC — at the Heart of Next-Generation Embedded Systems. The morning is then devoted to system and platform design, with presentations from Space Codesign and Cadence, and a panel session on How to make ESL really workwith Greg Wright of Alcatel, Mike McNamara of Adapt-IP, Gene Matter of Decoa Power, Guy Bois of Space Codesign, and Franck Schirrmeister of Cadence.

After lunch it is all about Design Collaboration with presentations by Synopsys, Intel, Nimbic, Xuropan and NetApp.

Then up into the 3rd dimension with a session on 3D system design, with presentations by Mentor, Cadence and Micron followed by a panel session 3DIC, are we there yet? with Dusan Petranovic of Mentor, Brandon Wang of Cadence, Mike Black of Micron, Ivo Bolsens the CTO of Xilinx, Gary Smith and Herb Reiter. Gene Jakubowski moderates.

Gary Smith is giving the keynote during dinner on Silicon Platforms + Virtual Platforms = An Explosion in SoC Design.

SemiWiki’s own Dan Nenni is giving the keynote on the second day on The FinFET value proposition. That is followed by a session on FinFET design challenges with presentations from Oracle, ARM, TSMC and Synopsys. Then after lunch the last session is on FinFET Foundry Design Enablement Challenges with presentations from 3 people from Global Foundries and ARM.

The complete agenda is here. Early registration ends on March 18th so don’t wait too long before you decide to go. UPDATE: the EDPS website is in error, early registration ends on 31st. So jog don’t sprint.