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Synopsys + NVIDIA = The New Moore’s Law

Synopsys + NVIDIA = The New Moore’s Law
by Daniel Nenni on 12-01-2025 at 8:00 am

Synopsys + NVIDIA = The New Moore’s Law

NVIDIA and Synopsys, two titans of the semiconductor ecosystem,  announced a landmark multi-year strategic partnership backed by a $2 billion investment from NVIDIA into Synopsys-led initiatives. The collaboration aims to fuse NVIDIA’s GPU-accelerated computing platform with Synopsys’ industry-leading electronic design automation and semiconductor IP portfolio to dramatically accelerate chip design cycles, slash power consumption, and enable the next generation of AI, automotive, and high-performance computing silicon.

At the heart of the partnership is the creation of a unified, cloud-native design environment that combines Synopsys’ TestMAX, Verdi, and VC Formal tools with NVIDIA’s cuLitho computational lithography platform and the broader Grace-Blackwell software stack. For the first time, designers will be able to run full-chip place-and-route, design-rule checking, and electromagnetic simulation at GPU-accelerated speeds that are 10–50× faster than traditional CPU-based flows. Early benchmarks shared during the announcement showed a 3nm AI training chip that previously required 12 weeks of compute time completing the same sign-off flow in under 60 hours on an NVIDIA DGX Cloud instance running Synopsys tools.

NVIDIA CEO Jensen Huang described the partnership as “the most important inflection in EDA since the invention of logic synthesis.” He emphasized that as chips approach one trillion transistors and enter the angstrom era, traditional Moore’s Law scaling is being replaced by “More than Moore” system-level innovation. “The bottleneck is no longer just the fab,” Huang said onstage at Synopsys’ SNUG conference in Santa Clara. “It’s the months designers spend waiting for verification regressions. We’re removing that bottleneck together.”

Synopsys CEO Sassine Ghazi revealed that the $2 billion commitment (structured as a combination of direct R&D funding, prepaid cloud credits, and joint engineering headcount) will fuel three flagship initiatives:

  1. A new AI-driven EDA suite, codenamed “Synopsys.ai Copilot,” built on NVIDIA’s BlueField-3 DPUs and Grace CPUs, capable of suggesting optimal floorplans, predicting timing closure, and auto-generating testbenches using large graph models trained on decades of Synopsys design data.
  2. Full integration of NVIDIA’s cuPPA (CUDA Power and Performance Analysis) toolkit into Synopsys PrimePower, enabling picowatt-accurate dynamic power simulation across multi-die systems, critical for next-generation AI accelerators and autonomous-vehicle SoCs.
  3. An open “NVIDIA-Synopsys Foundry Design Kit” program that will ship pre-validated reference flows for TSMC’s 2nm and Intel 18A process nodes, dramatically lowering the barrier for startups and hyperscalers to tape out complex chiplet-based designs.

The market reaction was immediate. Synopsys shares surged 18% in after-hours trading, pushing its market cap above $110 billion for the first time, while NVIDIA climbed another 4%, extending its year-to-date gain past 180%. Analysts hailed the deal as a defensive masterstroke for NVIDIA, which has faced increasing scrutiny over its dominance in AI training hardware. By locking in Synopsys—the clear EDA market leader with over 55% share in digital design—NVIDIA effectively raises the competitive moat around its ecosystem. Rival EDA players Ansys (recently acquired by Synopsys) and Cadence now face the prospect of their flagship tools running sub-optimally on anything but NVIDIA silicon.

Perhaps most intriguingly, sources close to the companies say the partnership includes a quiet but far-reaching clause: any chip designed using the jointly developed flows must include an NVIDIA-authored “design watermark” in the GDSII file—a cryptographic signature that can be read by NVIDIA’s cloud orchestration layer. While both companies insist this is purely for performance benchmarking and royalty-free IP tracking, critics are already calling it a “tax on the fabless future.”

For engineers on the ground, however, the promise is simple and profound: tapeouts that once took nine months may soon take nine weeks. As one Arm-based SoC architect told me after the keynote, “If this works, we’re not just designing chips faster; we’re designing chips that were previously impossible.”

With Samsung, Broadcom, and MediaTek already signed up as alpha customers, the NVIDIA-Synopsys axis has just redrawn the battle lines of semiconductor innovation. The era of GPU-accelerated silicon design has officially begun.

Read the press release HERE

Also Read:

Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech Evolution

TCAD Update from Synopsys

Synopsys and NVIDIA Forge AI Powered Future for Chip Design and Multiphysics Simulation

Chiplets: Powering the Next Generation of AI Systems

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