WP_Term Object
(
    [term_id] => 35
    [name] => Methodics
    [slug] => methodics
    [term_group] => 0
    [term_taxonomy_id] => 35
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 85
    [filter] => raw
    [cat_ID] => 35
    [category_count] => 85
    [category_description] => 
    [cat_name] => Methodics
    [category_nicename] => methodics
    [category_parent] => 157
)
            
image campaign semi conductor 800x100 1
WP_Term Object
(
    [term_id] => 35
    [name] => Methodics
    [slug] => methodics
    [term_group] => 0
    [term_taxonomy_id] => 35
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 85
    [filter] => raw
    [cat_ID] => 35
    [category_count] => 85
    [category_description] => 
    [cat_name] => Methodics
    [category_nicename] => methodics
    [category_parent] => 157
)

Impact Conference: Focus on the IP Ecosystem

Impact Conference: Focus on the IP Ecosystem
by Daniel Payne on 12-11-2013 at 7:07 pm

Jim Feldhan, President of Semico Research presented earlier this month at the Impact Conference on the topic: Focus on the IP Ecosystem. I’ve reviewed his 19 page presentation, and summarize it with:

  • End markets like smart phones and tablets are dominant
  • Growth drivers include the Internet of Things (IoT)
  • World semi forecast of $355 billion in 2014
  • IP growth healthy at 20% or so

At this years Semico IMPACT Summit they presented some of the key trends in the IP market, and I wanted to get Simon Butler’s thoughts on these, and how they impact Methodics, customers, and the industry as a whole.


​Simon Butler, Methodics

Q&A

Q: During the summit, Semico presented data showing the number of IP blocks and amount of IP reuse rising rapidly with on average over 65% of the chip now consisting of reuse, rising to 80% in the next few years. They also showed we have now passed the 100 unique IP blocks per design average.

What do you think is driving this rapid increase?


Worldwide Semiconductor IP Market

A: As SoC’s are becoming more complex its only natural that people begin to look outside for non-critical functional blocks in the form of 3rd party IP, as well as try to leverage internal IP as widely as possible. For example, when you look at the cost of developing mixed-signal IP for advanced geometries its no longer possible to justify the development expense unless it is used in multiple designs.

The net result is an increase in the number of IP blocks as well as the overall reuse that we see, and now individual IP’s are now becoming so complex they look just like smaller SoC’s.

Q: How do you think this increase in design reuse will change how IP design and management is done?


Semiconductor IP blocks per design

A: Its clear that at this scale the ad-hoc methods people have been using to manage IP and SoC integration have broken down. What used to work for simpler IP, and SoC’s with only a small number of blocks hasn’t been able to scale.

At Methodics we help customers deploy a structured approach to IP lifecycle management, and SoC design management. We have taken the analog design management expertise we have proven over the years with our VersIC product, added the digital expertise we acquired through Missing Link Tools and combined that with best practices and products available in the software development world. The end result is our ProjectIC Platform, a complete IP Lifecycle and design data management solution.

Its only by managing the complete IP lifecycle, from creation to integration, that we can hope to help customers and reduce waste and the sources of error in their design process.

Q: When you look at the IP market over the last few years, what are the most significant changes you have witnessed?

A: Probably the biggest change is that companies I would never of believed would have gone outside for 3rd party IP are now routinely doing so. Obviously CPU’s were the first to drive this trend, but it has now spread to critical mixed-signal components, and things that in the past they would have considered design differentiators.

This change is helping them to better focus on there core value-add, but it is greatly increasing the complexity of managing this IP. They now have much less control over the IP, and making it even more complex is that the IP is evolving in parallel with their own design. This means keeping all the design components in sync is critical, and without a management solution it becomes very time consuming and error prone.

Q: An area Semico has talked about often, and they presented additional data at this years conference is the emergence of the IP subsystem – does this change anything about how people manage IP and IP based design?


IP Subsystem Growth

A: Not really. Most of the IP that we see with customers today is already complex hierarchical designs that integrate many other small IP’s. The only real difference with sub-systems is that there is now a software component that needs to be considered, tracked and released along with the IP.

When we designed ProjectIC we were well aware of the need to accommodate software development for embedded systems – and that is why we built our solution on top of industry leading software design management tools. That way IP and software can live side-by-side in the same repository, while both sides are able to use tools optimized to their design process. This would not be possible had we gone the route of building our own unique DM solution, or deeply embedding a legacy product. By building on the latest capabilities our solution benefits from the rapid advances in the software infrastructure, while at the same time, not trying to force fit hardware designers into software methods.


IP Subsystem Markets

Q: What do you see as the next big challenge for Methodics in IP Management?

A: For now we are focused on getting ProjectIC deployed across as many customers as possible. There is already so much great stuff in the platform, and nothing else on the market comes close to its capabilities. People are only just coming around to the need for IP and SoC design management so there is a lot of work needed to educate the design teams – as we do that there will be lots to keep us busy.

Beyond that we are looking into solutions that would allow IP providers to more closely integrate with there customers IP management solutions, as well as potentially bringing in additional types of design data needed for the system and sub-system context.

More Articles by Daniel Payne …..

lang: en_US

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.