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Tanner EDA Update 2012

Tanner EDA Update 2012
by Daniel Nenni on 05-27-2012 at 4:15 pm

Rather than fly to Southern California this week I decided to drive. Airport parking and security, flying to Irvine and renting a car, driving to San Diego and back to Irvine, then flying home is just too much. Call it Porsche therapy, I would rather drive. On the way home I will take the scenic 101 and enjoy the ocean views.

First stop… Read More


Analog FastSPICE added to Tanner EDA

Analog FastSPICE added to Tanner EDA
by Daniel Payne on 05-24-2012 at 10:18 am

Last year when I visited Tanner EDA at DAC I heard about how they integrated the Analog FastSPICE circuit simulator from Berkeley DA.

This made sense to me because BDA has a good reputation for speeding up SPICE without compromising on accuracy, and Tanner users may want to mix and match tools from multiple EDA vendors.

This year they’ve… Read More


It is free after you pay for it and there is a one-time annual fee: The Case for FD-SOI

It is free after you pay for it and there is a one-time annual fee: The Case for FD-SOI
by Camille Kokozaki on 05-04-2012 at 7:09 am

In one of Portlandia’s TV program sketches, there is a funny interchange between a carrier salesperson and Fred Armisen (of SNL fame) who was trying to buy a phone. One chuckle line was a statement by the seller that the phone was free after paying for it and that there was a one-time annual fee. With this anecdote as a mental backdrop,… Read More


GSA 3DIC and Cadence

GSA 3DIC and Cadence
by Paul McLellan on 04-29-2012 at 10:00 pm

At the GSA 3D IC working group meeting, Cadence presented their perspective on 3D ICs. Their view will turn out to be important since the new chair of the 3D IC working group is going to be Ken Potts of Cadence. Once GSA decided the position could not be funded then an independent consultant like Herb Reiter had to bow out and the position… Read More


Keeping Moore’s Law Alive

Keeping Moore’s Law Alive
by Paul McLellan on 04-27-2012 at 12:37 pm

At the GSA silicon summit yesterday the first keynote was by Subramanian Iyer of IBM on Keeping Moore’s Law Alive. He started off by asking the question “Is Moore’s Law in trouble?” and answered with an equivocal “maybe.”

Like some of the other speakers during the day, he pointed out that … Read More


AMS Design using Co-Simulation

AMS Design using Co-Simulation
by Daniel Payne on 04-23-2012 at 11:13 am

The big three vendors in EDA offer AMS simulation tools but what about simulation choices from other EDA vendors?

It turns out there are two privately held EDA companies that have done business since the 1980’s and have just integrated a Verilog A simulator with a SPICE circuit simulator. The two companies are Aldec with a … Read More


MEMS and IC Co-design

MEMS and IC Co-design
by Daniel Payne on 04-10-2012 at 11:37 am

This morning I attended a webinar about MEMS and IC co-design from a company called SoftMEMS along with Tanner EDA. I learned that you can co-design MEMS and IC either in a bottom-up or top-down methodology, and that this particular flow has import/export options to fit in with your mechanical simulation tools (Ansys, Comsol, Open… Read More


GSA Silicon Summit at the Computer History Museum!

GSA Silicon Summit at the Computer History Museum!
by Daniel Nenni on 04-04-2012 at 9:52 pm

The first GSA Silicon Summit will address the complexity, availability and time-to-market challenges that the industry must overcome to enable low power, cost effective solutions to keep pace with Moore’s Law. With never ending customer demand of better, faster and cheaper, semiconductor manufacturers must continually… Read More


How Co-design of MEMS-IC Saves Time

How Co-design of MEMS-IC Saves Time
by Daniel Payne on 04-04-2012 at 10:18 am

I learned about MEMS layout automation at a webinar in December and plan to attend another webinar next week on April 10thwhere two companies have created a MEMS-IC co-design flow, Tanner EDA and SoftMEMS. The big challenge is to ensure that the MEMS and electronic parts of a new design will simulate correctly before committing … Read More


Universal Flash Storage: Webinar

Universal Flash Storage: Webinar
by Paul McLellan on 02-24-2012 at 2:24 pm

There has been a general trend for over a decade now towards the use of very fast serial interfaces instead of wide parallel interfaces. This has been driven by a number of different factors ranging from the lack of pins on an SoC, the difficulty of keeping wide parallel interfaces free of skew, limitations on printed circuit board… Read More