The explosive growth in portable devices over the past decade has left manufactures in a quandary over how to add memory to their products that meet several criteria:
I have bloggedbefore Christmas about the Arteris-Sonics war, initiated by Sonics, claiming that Arteris NoC IP product was infringing Sonics patent. We had shown in this post that the architecture of Sonics interconnects IP product was not only older but also different from Arteris’ NoC architecture: the products launched … Read More
DesignCon is coming up and the panel discussions look very interesting this year. The one panel session that I recommend most is called, “Analog and Mixed-Signal Design and Verification” which is moderated by Brian Bailey, one of my former Mentor Graphics buddies and fellow Oregonian.… Read More
My wife and I have traveled to Switzerland on vacation and marveled at the natural beauty of the mountains, efficient train system, tasty chocolate, and wonderful foods. I only wished that our American dollar bought more in Swiss currency than it did. Recently I discovered a high-tech IC design company called Microdul that designs… Read More
T’is the season to be jolly…and to predict the next year’s semiconductor market.
KPMG does a regular survey of senior executives in semiconductor companies to get their outlook on the year ahead. The message this year is mixed. 41% of executives expected their business to grow by more than 5% next year, which sounds not too bad until… Read More
At a webinar today I listened and learned about how a tool called L-Edit can be used to layout MEMS designs plus automate the task to be more productive. I can see how the history of IC layout editing is now being repeated with MEMS because in the earliest IC layout tools we could only do manual entry of polygons, then gradually we got cells… Read More
My automobile has an air bag system that uses a MEMS (Micro Electro Mechanical System) sensor to tell it when to deploy, and I’ve read headlines talking about MEMS over the years so I decided it was about time to learn more by attending a Webinar on Wednesday, December 14th at 8AM Pacific Time.
The EDA company hosting the Webinar… Read More
My last IC design at Intel was a Graphics Chip and I developed a layout generator for Programmable Logic Arrays (PLA) that automated the task, so I’ve always been interested in how to make IC layout more push-button and less polygon pushing. Today I watched a video about HiPer DevGen from Tanner EDA and wanted to share what I … Read More
The text of this very first article about Arteris had disapeared from Semiwiki, for an absolutely unknowed reason…If you have missed it, this is a pretty useful introduction to NoC concept, as well as to the legal battle between Arteris and Sonics:
The Network on Chip is a pretty recent concept. Let’s try to understand how … Read More
Every analog designer needs a foundry PDK (Process Design Kits) and EDA tools to design, layout and verify their AMS chip or IP. This week I had a chance to conduct an email interview with Taek-Soo Kim, VP of Technical Engineering at Dongbu HiTek in Korea. This specialty foundry supplies analog silicon worldwide.
Interview
Q: Tell… Read More
