Today the non-volatile memory (NVM) foundation is the eFuse. It is typically available for free from the foundry and is the default choice because, like Mount Everest, it is there. However, like Mount Everest it is big. It is also power hungry and slow. eFuse solutions blow the silicide on the poly line creating a change in resistance.… Read More
Semiconductor Intellectual Property
Love IP Party at DAC 2015
Once again there is a Heart of Technology event at DAC. It is the Love IP Party on Monday evening. Full details at the end of this entry, but first a bit of context. Heart of Technology was started by Jim Hogan who probably doesn’t need much introduction to anyone who has worked in EDA for any length of time.
I met with Jim, along with… Read More
What is Real SAMV71 DSP Performance in Auto Audio?
Why selecting ARM Cortex-M7 processor based Atmel SAMV70/71 for automotive entertainment application? The top three reasons are the Cortex-M7 clock speed (300 Mhz), the integration of a floating point (FPU) DSP and, last but not least because Atmel SAMV70/71 has obtained automotive qualification. If you dig into SAMV70/71… Read More
What is Real SAMV71 DSP Performance in Auto Audio?
Why selecting ARM Cortex-M7 processor based Atmel SAMV70/71 for automotive entertainment application? The top three reasons are the Cortex-M7 clock speed (300 Mhz), the integration of a floating point (FPU) DSP and, last but not least because Atmel SAMV70/71 has obtained automotive qualification. If you dig into SAMV70/71… Read More
TSMC 10nm Readiness and 3DIC
At the TSMC Technology Symposium last month Suk Lee presented a lot of information on design enablement. Suk is an interesting guy with a unique background in ASIC, Semiconductor, EDA, and now Foundry. In baseball terms that would be like playing infield, outfield, home plate, and umpire!
Around the turn of the millennium Suk actually… Read More
Automating Timing Closure Using Interconnect IP, Physical Information
Timing closure is a “tortoise” for some system-on-chip (SoC) designers just the way many digital guys call RF design a “black art”. Chip designers often tell horror stories of doing up to 20 back-end physical synthesis place & route (SP&R) iterations with each iteration taking a week or more. “Timing closure”, a largely… Read More
The 2015 DAC Designer and IP Track
What an exciting year for DAC with record submissions in nearly every category. Most impressive is the increase in Designer and IP Track submissions, content that is helping to continue to evolve and improve the show. If you haven’t already registered, why not do so now?
A brief bit of background about the conference: DAC’s roots… Read More
Semiwiki Blogger at DAC: MIPI Beyond Mobile, Myth or Reality?
Some of the various MIPI specifications are now massively used in mobile (smartphone or tablet), especially the Multimedia related specs like Camera Serial Interface (CSI-2), Display Serial Interface (DSI) or SoundWire (even if the spec has been released in December 2014, the adoption rate is very sharp, no doubt that it will… Read More
Heterogeneous Processing: Power Reduction and Performance Advances
Implementation of Heterogeneous processors has shown demonstrated reduction in power consumption and improved performance in mobile processors like ARM_big.LITTLE technology, where low power and relatively slower cores are coupled with the more powerful ARM cores. According to ARM Holdings, it can save 75% of CPU energy… Read More
Agile IC: All You Gotta Do To Join Is…
Back last October 1st was an announcement of Agile IC Methodology. As I said then:Today Sonics has launched the Agile IC Methodology along with several collaborators. The initial phase is to create a LinkedIn group to start the discussion.
See also Agile IC Development
At that point there was just an idea and a LinkedIn group. The… Read More


TSMC vs Intel Foundry vs Samsung Foundry 2026