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Methodology for Aging-Aware Static Timing Analysis

Methodology for Aging-Aware Static Timing Analysis
by Tom Dillinger on 12-28-2021 at 10:00 am

char STA flow

At the recent Design Automation Conference, Cadence presented their methodology for incorporating performance degradation measures due to device aging into a static timing analysis flow. [1] (The work was a collaborative project with Samsung Electronics.)  This article reviews the highlights of their presentation.

BackgroundRead More


Delivering Systemic Innovation to Power the Era of SysMoore

Delivering Systemic Innovation to Power the Era of SysMoore
by Kalar Rajendiran on 12-28-2021 at 6:00 am

Evolving Landscape

With the slowing down of Moore’s law , the industry as a whole has been working on various ways to maintain the rate of growth and advancements. A lot has been written up about various solutions being pursued to address specific aspects. The current era is being referred to by different names, SysMoore being one that Synopsys uses.… Read More


DAC 2021 – Taming Process Variability in Semiconductor IP

DAC 2021 – Taming Process Variability in Semiconductor IP
by Daniel Payne on 12-27-2021 at 10:00 am

process node variability min

Tuesday at DAC was actually my very first time attending a technical session, and the presentation from Nebabie Kebebew, Siemens EDA, was called, Mitigating Variability Challenges of IPs for Robust Designs. There were three presentations scheduled for that particular Designer, IP and Embedded Systems track, but with the COVID… Read More


5 Talks on RISC-V

5 Talks on RISC-V
by Milos Tomic on 12-27-2021 at 6:00 am

Milos Tomic

Veriest recently hosted a webinar focusing on RISC-V as a forerunner of ongoing open-source revolution in chip design. Speakers were distinguished professionals from industry and academia. Webinar covered topics from market trends to open-source hardware initiatives, tools and methodologies.

Zvonimir Bandić: RISC-V Read More


More Than Moore and Charting the Path Beyond 3nm

More Than Moore and Charting the Path Beyond 3nm
by Kalar Rajendiran on 12-22-2021 at 10:00 am

Cadence AIML Technologies

The incredible growth that the semiconductor industry has enjoyed over the last several decades is attributed to Moore’s Law. While no one argues that point, there is also industry wide acknowledgment that Moore’s Law started slowing down around the 7nm process node. While die-size reductions still scale, performance jumps… Read More


DAC 2021 – Siemens EDA talks about using the Cloud

DAC 2021 – Siemens EDA talks about using the Cloud
by Daniel Payne on 12-21-2021 at 10:00 am

Craig Johnson

My third event at DAC on Monday was all about using EDA tools in the Cloud, and so I listened to Craig Johnson, VP EDA Cloud Solutions, Siemens EDA. Early in the day I heard from Joe Sawicki, Siemens EDA, on the topic of Digitalization.

Why even use the Cloud for EDA? That’s a fair question to ask, and Craig had several high-level… Read More


DAC 2021 Wrap-up – S2C turns more than a few heads

DAC 2021 Wrap-up – S2C turns more than a few heads
by Ron Green on 12-20-2021 at 10:00 am

IMG 7547

Now that the 58th Design Automation Conference held this year in San Francisco has concluded, we take a minute to look back at the results and ascertain what it meant for our company.

Unfortunately, many popular tradeshows held in the time of Covid have suffered a drop in attendance, and DAC was no exception. Despite this however,… Read More


Is Ansys Reviving the Collaborative Business Model in EDA?

Is Ansys Reviving the Collaborative Business Model in EDA?
by Daniel Nenni on 12-16-2021 at 10:00 am

Evolution of Multiphysics Complexity

The Electronic Design Automation (EDA) industry used to be a bustling bazaar of scrappy startups, along with medium sized companies that dominated a technology space, and big main-line vendors. The annual Design Automation Conference was noisy, hectic, and sprawled over multiple large convention halls. This diversity meant… Read More


Top 10 Takeaways from DAC 2021

Top 10 Takeaways from DAC 2021
by Tom Dillinger on 12-15-2021 at 2:00 pm

stopped clock license model

The “in-person” portion of the Design Automation Conference (DAC) was recently held in San Francisco.  (As several presenters were unable to attend, a “virtual” program is also available.)  The presentations spanned a wide gamut – e.g., technical advanced in design automation algorithms;  new features in commercial EDA tools; … Read More


Semicon West is Semicon Less

Semicon West is Semicon Less
by Robert Maire on 12-15-2021 at 10:00 am

Semicon West 2021
  • Semicon West was Semicon Less- Less Customers & Vendor
  • Everyone is busy as can be, maybe too busy to attend
  • Those who were there, talk about supply chain issues & stress
  • How long does the party last & where the money comes from?

Semicon West was Semicon Less….

We attended a “Hybrid” version of Semicon… Read More