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0.55 High-NA Lithography Update

0.55 High-NA Lithography Update
by Tom Dillinger on 05-31-2022 at 6:00 am

mask infrastructure 0 55

At the recent SPIE Advanced Lithography + Patterning Conference, Mark Phillips from Intel gave an insightful update on the status of the introduction of the 0.55 high numerical aperture extreme ultraviolet lithography technology.  Mark went so far as to assert that the development progress toward high-NA EUV would support … Read More


Using EM/IR Analysis for Efinix FPGAs

Using EM/IR Analysis for Efinix FPGAs
by Daniel Payne on 05-30-2022 at 10:00 am

XLR min

I’ve been following the EM/IR (Electro-Migration, IR is current and resistance) analysis market for many years now, and recently attended a presentation from Steven Chin, Sr. Director IC Engineering of Efinix, at the User2User event organized by Siemens EDA. The Tuesday presentation was in the morning at the Marriott… Read More


Die-to-Die IP enabling the path to the future of Chiplets Ecosystem

Die-to-Die IP enabling the path to the future of Chiplets Ecosystem
by Kalar Rajendiran on 05-30-2022 at 6:00 am

Die to Die Interface Figure of Merit

The topic of chiplets is getting a lot of attention these days. The chiplet movement has picked up more momentum since Moore’s law started slowing down as process technology approached 5nm. With the development cost of a monolithic SoC crossing the $500M and wafer yields of large die-based chips dropping steeply, the decision … Read More


The New Normal for Semiconductor Manufacturing

The New Normal for Semiconductor Manufacturing
by Daniel Nenni on 05-27-2022 at 6:00 am

200mm 300mm Semiconductor Capacity

One of the recent live events I attended was the 2022 GSA Silicon Leadership Summit on May 12th at the Santa Clara Convention Center (my favorite location). This was the first GSA live event in two years so it was a must attend gathering. This event targets semiconductor ecosystem executives (200+ people attended) so there were many… Read More


[WEBINAR] Secure your devices with PUF plus hardware root-of-trust

[WEBINAR] Secure your devices with PUF plus hardware root-of-trust
by Don Dingee on 05-25-2022 at 10:00 am

NVM secret key storage problems

It’s a hostile world we live in, and cybersecurity of connected devices is a big concern. Attacks are rising rapidly, and vulnerabilities get exploited immediately. Supply chains are complex. Regulations are proliferating. Secrets don’t stay secrets for long – in fact, the only secret in a system with open-source algorithms… Read More


Sensing – Who needs it?

Sensing – Who needs it?
by Dave Bursky on 05-24-2022 at 6:00 am

Analog Bits Sensing SemiWiki

In a simple answer – everyone.  A keynote presentation “Sensing the Unknowns and Managing Power” by Mahesh Tirupattur, the Executive Vice President at Analog Bits at the recent Siemens User2User conference, discussed the need and application of sensors in computing and power applications. Why sense? As Mahesh explains, sensing… Read More


Protecting High-Speed Interfaces in Data Centers with Security IP

Protecting High-Speed Interfaces in Data Centers with Security IP
by Kalar Rajendiran on 05-23-2022 at 6:00 am

SoCs Have Many Interfaces That Require Security

The never ending appetite for higher bandwidths, faster data interfaces and lower latencies are bringing about changes in how data is processed at data centers. The expansion of cloud to the network edge has introduced broad use of artificial intelligence (AI) techniques for extracting meaning from data. Cloud supercomputing… Read More


Double Diffraction in EUV Masks: Seeing Through The Illusion of Symmetry

Double Diffraction in EUV Masks: Seeing Through The Illusion of Symmetry
by Fred Chen on 05-22-2022 at 7:00 am

Double Diffraction in EUV Masks

At this year’s SPIE Advanced Lithography conference, changes to EUV masks were particularly highlighted, as a better understanding of their behavior is becoming clear. It’s now confirmed that a seemingly symmetric EUV mask absorber pattern does not produce a symmetric image at the wafer, as a conventional DUV … Read More


Take a Leap of Certainty at DAC 2022

Take a Leap of Certainty at DAC 2022
by Daniel Nenni on 05-22-2022 at 6:00 am

Ansys DAC 2022

The live events I have attended thus far this year have been very good. As much as I liked the virtual events, attending in the comfort of my home or sailboat, it is great to be live and networking inside the semiconductor ecosystem, absolutely.

Ansys has been a great supporter of the Design Automation Conference but this year they … Read More


Intel to present Intel 4 process at the VLSI Technology Symposium

Intel to present Intel 4 process at the VLSI Technology Symposium
by Scotten Jones on 05-20-2022 at 8:00 am

VLSI Symposium 2022 SemiWiki 1

The VLSI Symposium on Technology & Circuits will be held in Hawaii from June 12th to June 17th. You can register for the conference here.

The tip sheet for the conference has been released and one thing that caught my eye is some data from the Intel 4 paper that Intel will be presenting at the conference.

Intel’s old roadmap had 14nm,… Read More