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Mentor and ASSET Intertech Do a DFT World Tour

Mentor and ASSET Intertech Do a DFT World Tour
by Beth Martin on 02-19-2015 at 1:01 pm

The Mentor Graphics test folks and ASSET Intertech have teamed up to provide a series of free DFT seminars in the US, Europe, and Asia. The first one is in Austin, TX on February 19, 2015, and the last is in Tokyo on April 24. Hereis the full list of locations and dates.

The morning session covers IJTAG. The new IEEE 1687 Internal JTAG (IJTAG)… Read More


MEMS Require 3D Field Solver for Accurate Cap Values

MEMS Require 3D Field Solver for Accurate Cap Values
by Tom Simon on 02-18-2015 at 9:00 am

MEMS devices have become extremely important and common. Freescale last year reported its combined MEMS shipments exceeded 2 billion units. If we just examine how many accelerometers we each probably own today, it is easy to see why the market for these products is growing so rapidly. The first and most obvious device is our cell… Read More


What’s Hot at SPIE Advanced Lithography

What’s Hot at SPIE Advanced Lithography
by Beth Martin on 02-04-2015 at 10:00 pm

The 40[SUP]th[/SUP] SPIE Advanced Lithography conference will be at the San Jose Convention Center 22-26 February. Over the past few years, this conference has grown in scope to include emerging patterning technologies, like directed self-assembly (DSA) and design-process-technology co-optimization.

Underlying all … Read More


Semiconductor Design: Chips to Systems!

Semiconductor Design: Chips to Systems!
by Daniel Nenni on 01-12-2015 at 8:00 pm

This is the 20[SUP]th[/SUP] year of DesignCon and I’m really looking forward to it. While I haven’t attended all 20 I certainly have attended the majority of them. Now it is like a college reunion for me seeing all sorts of friends and former coworkers. One of them is even a keynote but more on that later. This year there are 14 conference… Read More


Mentor Moves to Enter IoT Fray

Mentor Moves to Enter IoT Fray
by Tom Simon on 01-09-2015 at 7:00 am

In December I signed up for an IoT “lunch and learn” hosted by Mentor Graphics. There were a number of surprising things about the session. The first and most obvious is that it was really a “breakfast-to-lunch and learn”. Starting at 9AM and going through the end of lunch, it was packed full of ‘learning.’ It was also packed full of … Read More


Virtual Emulation Extends Debugging Over Physical

Virtual Emulation Extends Debugging Over Physical
by Pawan Fangaria on 12-13-2014 at 7:30 am

Amid burgeoning complexity of SoC verification with ever increasing hardware, software and firmware content, verification engineers are hard pressed with learning multiple tools, technologies and methodologies and still completing SoC verification with full accuracy in time. The complexity, size and diversity of SoC … Read More


Predicting Component Temperature Early in Design

Predicting Component Temperature Early in Design
by Pawan Fangaria on 11-28-2014 at 7:00 am

In today’s electronics with multiple functions working together, heat generation is on the rise; sometimes it becomes intolerable. In fact components running at different temperatures can cause timing issues, and very high temperatures can lead to operational issues such as latch-up. An electronic system can contain chips,… Read More


Mentor Aims to Improve Yield and Production Ramp for PCBs

Mentor Aims to Improve Yield and Production Ramp for PCBs
by Tom Simon on 11-24-2014 at 7:00 am

Getting a printed circuit board from design and into production presents one of the biggest challenges in successfully launching a product. The designer’s job is to anticipate issues that can adversely affect PCB fabrication and assembly. Design rules and component libraries go part of the way, but there is a thicket of things… Read More


Its a bouncing baby IEEE standard!

Its a bouncing baby IEEE standard!
by Beth Martin on 11-04-2014 at 12:00 am

Pass the cigars! On November 3rd, 2014, the IEEE-SA Standards Board finally approved IEEE P1687 as a new standard. From now on, you can drop the “P” and just call it 1687, or to its friends, IJTAG. Now would be a good time to sign up for an IJTAG technical workshop.

The new IEEE 1687 Internal JTAG (IJTAG) standard is changing… Read More


Improving Verification by Combining Emulation with ABV

Improving Verification by Combining Emulation with ABV
by Tom Simon on 10-30-2014 at 4:00 pm

Chip deadlines and the time to achieve sufficient verification coverage run continuously in a tight loop like a dog chasing its tail. Naturally it is exciting when innovative technologies can be combined so that verification can gain an advantage. Software based design simulators have been the mainstay of verification methodologies.… Read More