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How PowerArtist Interfaces with Emulators

How PowerArtist Interfaces with Emulators
by Pawan Fangaria on 07-16-2015 at 5:00 pm

Last month in DAC I could see some of the top innovations in the EDA world. EDA is a key enabler for advances in semiconductor designs. Among a number of innovations worth mentioning (about which I blogged just after DAC), the integration of Mentor’s Veloce with ANSYS’ PowerArtist for power analysis of live applications caught my… Read More


Power Management Gets Tricky in IP Driven World

Power Management Gets Tricky in IP Driven World
by Pawan Fangaria on 07-08-2015 at 7:00 pm

Today, an SoC can have multiple instances of an IP and also instances of many different IPs from different vendors. Every instance of an IP can work in a separate mode and requires a dedicated power arrangement which may only be formalized at the implementation stage. The power intent, if specified earlier, will need to be re-generated… Read More


What’s New in Functional Verification Debug

What’s New in Functional Verification Debug
by Daniel Payne on 06-28-2015 at 7:00 am

We often think of EDA vendors competing with each other and using proprietary data formats to make it difficult for users to mix and match tools, or even create efficient flows of tools. At the recent DAC event in San Francisco I was pleasantly surprised to hear that two EDA vendors decided to cooperate instead of create incompatible… Read More


Predicting Lifetime of Analog ICs

Predicting Lifetime of Analog ICs
by Pawan Fangaria on 06-22-2015 at 12:30 pm

With the increase of transistors per unit area, high density interconnects and manufacturing variability at lower nodes, the electronic devices have become more vulnerable to failures. The devices that operate under extreme conditions such as automotive devices that operate at high temperatures need to be robust enough to… Read More


The Best Conversations You Missed at #52DAC!

The Best Conversations You Missed at #52DAC!
by Daniel Nenni on 06-17-2015 at 7:00 pm

The CEO Fireside Chats were my very favorite part of #52DAC. Dr. Walden Rhines, Lip-Bu Tan, and Dr. Aart de Geus are heroes of the EDA industry, absolutely. I saw all three Fireside Chats and the one word that I’m left with is INSPIRED! … Read More


Why silicon photonics and 2.5D design go together

Why silicon photonics and 2.5D design go together
by Beth Martin on 06-10-2015 at 4:30 pm

Silicon photonics is one of the upstart “More than Moore” technologies designed to enable the next generation of high-performance devices. Photonic design is the art of moving and transforming signals in the form of photons, allowing the message to literally travel at the speed of light, and bringing the promise of significant… Read More


Automate those voltage-dependent DRC checks!

Automate those voltage-dependent DRC checks!
by Beth Martin on 06-04-2015 at 10:00 pm

Because IC design and verification never gets simpler, verification engineers now have to comply with voltage-dependent DRC (VD-DRC) rules. What does this term mean, and what new challenges does it bring to the DRC task? I’d like to share what I learned during another water-cooler conversation with Dina Medhat, senior technical… Read More


Will those IO pad rings pass foundry muster?

Will those IO pad rings pass foundry muster?
by Beth Martin on 05-31-2015 at 10:00 pm

I was talking recently to Dina Medhat, a senior technical marketing engineer at Mentor, about, of all things, IO rings. It has not occurred to me that verifying that your IO rings comply with foundry rules presents new challenges.

IO ring checking isn’t new, nor is it unique to advanced IC process nodes. However, the same forces of… Read More


Getting the Best Dynamic Power Analysis Numbers

Getting the Best Dynamic Power Analysis Numbers
by Daniel Payne on 05-27-2015 at 1:00 pm

On your last SoC project how well did your dynamic power estimates match up with silicon results, especially while running real applications on your electronic product? If your answer was, “Well, not too good”, then keep reading this blog. A classical approach to dynamic power analysis is to run your functional testbench… Read More


How to design silicon photonics–take this class!

How to design silicon photonics–take this class!
by Beth Martin on 05-25-2015 at 9:30 pm

Silicon Photonics is the hottest prospect for blazing fast communication between chips in servers, data centers, and supercomputers.

By using light instead of electrical signals, it promise to usher in a new standard of high performance, low power devices while extending the use of more mature process nodes, helping to reduce… Read More