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Electronic Design Automation
This blog is a follow-up to my second most viewed page Moore’s Law and 40nm Yield, with a strong recommendation of how to design for yield at the advanced nodes (32/28/22nm) with Verify High-Sigma design technology.
Case in point: Circuit blocks such as complex standard cells or memory bit cells are repeated thousands or even millions… Read More
This Blog is a follow-up to my ever popular declaration that EDA is DEAD. I know comparing Google to Synopsys is apples and oranges, or more appropriately comparing apples and prunes, but the business model contrast is relevant. Googled: The End of the World As We Know It is absolutely the best book on Google to date. I also read Planet… Read More
In the name of blogging and increased transparency lets talk about wafer allocation, because it’s coming, believe it. There is already a significant delta between wafer demand and manufacture due to record low inventory levels and the exploding semiconductor demand in China. Both TSMC and UMC posted good July sales numbers: … Read More
Years ago I bought my ancestral home, the house where my beloved grandparents lived, the place in which I grew up. It was more an emotional investment than a financial one, much more. After completely renovating it with my keyboard hardened hands, reliving much of my childhood, I joined the ranks of the slum lords and rented the house… Read More
For those of you who follow the market and play EDA stocks this will be a shocker! Jim Cramer, former Hedge Fund Manager, co-founder of TheStreet.com, and host of the CNBC’s Mad Money did a piece last week on Cadence. Apparently he did NOT read my piece on EDA being DEAD:
Cramer’s Wednesday “Tech Spec” pickswas Cadence Design Systems… Read More
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Should the US Government Invest in Intel?