Bronco Webinar SemiWiki
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4486
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4486
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)

Synopsys and Intel Foundry Enable System-Level Design on Intel 14A

Synopsys and Intel Foundry Enable System-Level Design on Intel 14A
by Daniel Nenni on 08-10-2026 at 10:00 am

Synopsys and Intel Foundry 14A Support

Synopsys and Intel Foundry are expanding their collaboration to accelerate customer adoption of Intel 14A, connecting advanced process technology with production-ready electronic design automation, silicon intellectual property, multiphysics analysis, and multi-die integration. Announced at the 2026 DAC Chips to Read More


DAC 2026: How Undo Makes AI for Chip Design Work Better

DAC 2026: How Undo Makes AI for Chip Design Work Better
by Mike Gianfagna on 08-10-2026 at 6:00 am

DAC 2026 How Undo Makes AI for Chip Design Work Better

DAC was abuzz this year with new AI-fueled approaches to chip design and debug. New tools powered by deeply trained models opened substantial possibilities to deliver higher quality designs much faster, potentially with less resources. Every new technology has its risks. For AI-driven chip design some of those risks center … Read More


ChipAgent Raises $134Million and Why it Matters

ChipAgent Raises $134Million and Why it Matters
by Daniel Nenni on 08-09-2026 at 10:00 am

ChipAgents Funding Round SemiWiki

In my 45 years experience in the semiconductor industry, 43 of that in EDA and IP, I have never seen such a meteoric rise of an EDA company. I do remember money being raised for EDA in the early days but never have I seen such a customer success in such a short amount of time.

I first met ChipAgents at DVCon Silicon Valley in 2025. It was an … Read More


Mach42 Delivers a Different Take on AI in the Design Flow at DAC 2026

Mach42 Delivers a Different Take on AI in the Design Flow at DAC 2026
by Mike Gianfagna on 08-06-2026 at 6:00 am

Mach42 Delivers a Different Take on AI in the Design Flow at DAC 2026

I believe DAC 2026 will be remembered as the turning point for AI assisted design. There has been discussion about AI infusion in EDA for a while now. Most of it was about how AI can be added to traditional tools to make existing methodologies better. This year, that changed. There were several new companies that highlighted a fundamentally… Read More


Shift Left with S2C Prodigy: From RTL Verification to Real-World Software Validation

Shift Left with S2C Prodigy: From RTL Verification to Real-World Software Validation
by Daniel Nenni on 08-04-2026 at 10:00 am

HAV

For modern SoC teams, “shift left” no longer means finding a few more RTL bugs before tape-out. It means moving meaningful system validation earlier—far enough left that firmware, operating systems, drivers, applications, and external interfaces can be exercised before first silicon arrives. This change is essential as software… Read More


Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems Conference

Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems Conference
by Daniel Nenni on 08-03-2026 at 10:00 am

dac hero image snps nvd 16 9

Purple was in fashion at the 2026 Design Automation Conference, where Synopsys reinforced its position at the forefront of AI-powered engineering. Under the conference’s “Chips to Systems” theme, the company showcased intelligent, end-to-end technologies designed to help the semiconductor industry manage unprecedented… Read More


DAC 2026: The Trouble with John Cooley’s Troublemaker Panel

DAC 2026: The Trouble with John Cooley’s Troublemaker Panel
by Mike Gianfagna on 07-31-2026 at 10:00 am

DAC 2026 The Trouble with John Cooley’s Troublemaker Panel

For quite a few years, John Cooley has hosted the Troublemaker Panel at DAC. The event consists of a panel of senior executives from the EDA industry. John Cooley asks his readers for “edgy” questions to ask the panelists and on event day, he does just that. Those with complete responses that are backed with real data from real customers… Read More


Industry’s First Certified Automotive Grade PUF for Software Defined Vehicles

Industry’s First Certified Automotive Grade PUF for Software Defined Vehicles
by Kalar Rajendiran on 07-30-2026 at 10:00 am

Automotive PUF Premium System Level Diagram

Software defined vehicles (SDVs) are transforming the automotive industry. Today’s vehicles are connected computing platforms that rely on advanced processors, artificial intelligence (AI), over the air (OTA) software updates, cloud services, and vehicle to everything (V2X) communications. Every electronic … Read More


Formal Acceleration on FPGA. Innovation in Verification

Formal Acceleration on FPGA. Innovation in Verification
by Bernard Murphy on 07-30-2026 at 6:00 am

Innovation New

Extending hardware acceleration to formal verification is a powerful idea to extend hardware acceleration to a verification domain that has not got much attention for acceleration. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford,… Read More


ASIC-to-FPGA Turnkey Prototyping Bundle: A Practical Path to Earlier Hardware Validation

ASIC-to-FPGA Turnkey Prototyping Bundle: A Practical Path to Earlier Hardware Validation
by Daniel Nenni on 07-29-2026 at 6:00 am

S2C FPGA Prototyping

For ASIC design teams, the gap between RTL simulation and first silicon remains one of the most consequential stages of the development cycle. Simulation provides controllability and visibility, but it cannot always reproduce the software workloads, interface behavior, clock interactions, and sustained system activity… Read More