Mark Ren has 26 years of EDA and AI R&D experience spanning IBM Research and NVIDIA Research, driving design automation innovations that power modern chip design. He received the IBM Corporate Award for contributions to the design closure for high-performance microprocessors. At NVIDIA, he helped establish the company
Electronic Design Automation
SemiAnalysis EDA Market Primer – Market Dynamics, Cadence, Synopsys, Siemens, China EDA Rise
Electronic Design Automation, or EDA, is the software infrastructure that transforms a hardware specification into a manufacturable integrated circuit. At advanced process nodes, the problem is no longer simply drawing transistors or connecting gates. A modern system-on-chip contains billions of standard cells, hundreds… Read More
Beyond Workflow Agents: Toward Design Intelligence in Analog EDA
Over the last year, the EDA industry has started using a new vocabulary: agents, super agents, mental models, native skills, playbooks, RAG, MCP, autonomous workflows, and AI-first design.
The language is new, but the motivation is familiar to anyone who has worked in chip design.
Design complexity keeps increasing. The number… Read More
MooresLabAI at DAC 2026: Why the Future of Semiconductor Engineering Is Agentic, Not Just Generative
For decades, semiconductor innovation has been constrained not by imagination, but by engineering capacity. While transistor density has continued to advance, the process of building chips has remained fundamentally manual, fragmented across specifications, RTL, verification, debugging, coverage analysis, and signoff.… Read More
IP Lifecycle Management in the AI Era
Large design enterprises have multiple concurrent activities around IP of various types: software/firmware, blocks defined in RTL or HLS, verification IPs of multiple different types, physical implementations, scripts/files for timing, power management, etc., etc. Each of these continues to evolve and branch to serve … Read More
See Autonomous Chip Design in Action with ChipAgents at DAC 2026
Making the AI wave at DAC 2026 in Long Beach
DAC comes to Long Beach for the first time in 2026, with artificial intelligence expected to be one of the central topics across the conference program and exhibition floor.
For semiconductor design and verification teams, the discussion has moved beyond whether AI can assist engineers.… Read More
Demonstrating the EasyAI ECO Suite – An AI-Powered Functional ECO Solution at DAC 2026
Easy-Logic, a leading provider of high-performance Engineering Change Order (ECO) solutions in Electronic Design Automation (EDA), will showcase its latest innovation — the EasyAI ECO Suite — at 2026 DAC in Los Angeles, July 27–29, 2026. This intelligent ECO solution integrates AI engines into the entire ECO workflow and systematically… Read More
From Detection to Safety: Reframing Fault Simulation for Functional Safety
In the early 1980s, when computer-aided engineering (CAE), the precursor to modern electronic design automation (EDA), was just taking shape, my professional trajectory shifted in a way that would prove foundational. I joined Teradyne, the Boston-based leader in automated test equipment (ATE), and I encountered for the first… Read More
Podcast EP353: What Real-Time Visibility Is and Why it Matters with yieldHUB’s John O’Donnell
Daniel is joined by John O’Donnell, Founder and CEO of yieldHUB, a pioneering leader in advanced data analytics for the semiconductor industry. Since establishing the company in 2005 he has transformed it from a two-person startup into a trusted multinational partner that empowers some of the world’s leading semiconductor … Read More
Foundation IP for Intel 18A: Technical Overview and Why It Matters
Synopsys Foundation IP for Intel 18A is a portfolio of semiconductor building blocks designed to help system-on-chip developers build advanced chips with better power, performance, and area, often called PPA. The offering includes embedded memory compilers, standard-cell logic libraries, and input/output libraries for… Read More


TSMC CoWoS versus Intel EMIB Semiconductor Packaging