Synopsys Foundation IP for Intel 18A is a portfolio of semiconductor building blocks designed to help system-on-chip developers build advanced chips with better power, performance, and area, often called PPA. The offering includes embedded memory compilers, standard-cell logic libraries, and input/output libraries for… Read More
Electronic Design Automation
WEBINAR: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools
The real promise of AI in EDA is not to replace EDA tools or reinvent design flows, it is to help engineers accomplish existing tasks even more complex design tasks faster, more safely, and with far less tool expertise than was previously required.
The webinar explores what a truly effective AI-powered EDA tool should look like, … Read More
Why Real-Time Intelligence is the Next Differentiator in Semiconductor Test
Even with advances in AI, automation, and advanced process technology, many semiconductor test operations still rely on reports generated hours after production has occurred. This creates a significant and growing problem. By the time engineers discover a yield excursion, parametric drift, tester issue, or an increase in… Read More
Improving Verification of Battery Cell Monitoring Chips
Batteries, especially for electric vehicles, are very much in the news these days. This technology is vital for many aspects of our modern lives, but people often worry about things like range limitations and the possibility of overheating. The industry is responding with electronic solutions for improving battery operation.… Read More
Enhancing Multi-Domain System Simulation with FMI Co-Simulation
As systems become increasingly complex across every field of science and engineering, the importance of computer simulation in design, analysis, and verification continues to increase over time. The traditional process in which a system is modeled and simulated in a single tool is called monolithic simulation. On the other… Read More
Applying QED to Hardware Accelerator Verification. Innovation in Verification
QED (Quick Error Detection) can be a powerful complementary addition to verification but can be subject to size constraints. This month’s paper looks at a fix for that limitation. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A)… Read More
When Software Outruns Silicon: Hardware-Assisted Test Generation to the Rescue
For the past decade, the semiconductor industry has been moving in one direction: shift-left, specifically, shifting more validation into the pre-silicon phase. The idea was straightforward: if software ultimately determines how a system behaves, then software should become a primary vehicle for verification.
The industry… Read More
Podcast EP352: The Path to High Impact Parallel AI Agents with ChipAgents CEO and Founder William Wang
Daniel is joined by William Wang the CEO and Founder of ChipAgents.ai, the category-leading agentic AI platform for advancing agent-based AI approaches for semiconductor workflows. He is also the Mellichamp Endowed Chair Professor of AI and Designs at UC Santa Barbara, and a global leader in fundamental AI research. He founded… Read More
How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late
Embedded systems programs often fail because critical engineering documentation drifts out of alignment over time and distance. This results in a team that is correctly following the wrong instructions. All forms of engineering documentation suffer from this problem, and it really is the silent killer of many programs.
llmda.ai… Read More
All-Embracing Multiphysics Analysis for Chiplet-Based Systems
What systems can accomplish by combining semiconductors, AI, and software seems at times boundless. Chiplet-based semiconductors deliver this promise, allowing a myriad of complex digital, memory, analog and photonic functions to be condensed into a single semiconductor package for higher performance, lower power consumption… Read More


Consolidation and Competition: Who is Winning the $4.5 Billion Interface IP Race?