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EDA

Electronic Design Automation

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Shifting Left with Static and Formal Verification

Shifting Left with Static and Formal Verification
by Bernard Murphy on 12-14-2017 at 7:00 am
Categories: EDA, Synopsys

Unless you have been living in a cave for the last several years, by now you know that “Shift Left” is a big priority in product design and delivery, and particularly in verification. Within the semiconductor industry I believe Intel coined this term as early as 2002, though it seems now to be popular throughout all forms of technology… Read More

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DSP Benchmarks and Libraries for ARC DSP families

DSP Benchmarks and Libraries for ARC DSP families
by Eric Esteve on 12-13-2017 at 12:00 pm
Categories: IP, Synopsys

Synopsys DesignWareARC HS4xD family is a perfect example of high performance DSP, enhanced RISC CPU IP core, able to address high-end IoT, mid to high-end audio or baseband control. ARC HS4xD architecture is 10-stage pipeline for high Fmax, resulting in excellent RISC efficiency with 5.2 CoreMark per MHz. ARC EMxD processors… Read More

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Starblaze Uses Synopsys DesignWare IP to Launch SSD Controller SoC

Starblaze Uses Synopsys DesignWare IP to Launch SSD Controller SoC
by Mitch Heins on 12-12-2017 at 12:00 pm
Categories: IP, Synopsys

I recently wrote an article about Synopsys’ DesignWare Security IP for the Internet-of-Things market and was interested to see that a startup, Starblaze Technology, has now used parts of the same IP in its latest Solid-State Drive (SSD) controller. The security IP caught my eye, but the rest of the story really put things into focus.… Read More

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Creative Noise-Reduction in Automotive AMS

Creative Noise-Reduction in Automotive AMS
by Bernard Murphy on 12-12-2017 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA

Automotive applications are one of the hottest domains today in semiconductor design. We’re bombarded daily with articles on new hybrids, electric cars, ADAS and autonomous cars, trucks and busses. All of these applications are certainly amazing, but the devices that make them work still have to deal with the same old challenges,… Read More

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Synopsys White Paper on IoT Security – Introduces DesignWare Root-of-Trust Module

Synopsys White Paper on IoT Security – Introduces DesignWare Root-of-Trust Module
by Mitch Heins on 12-11-2017 at 12:00 pm
Categories: IoT, Security, Synopsys

As the internet of things (IoT) continues its climb to a trillion devices, there has been many articles and books written on the need for securing those devices. With all the IoT gear that I seem to be picking up as Christmas presents, I feel like I’m doing my part to help the market get there, but I have to say, I sure hope the SoC designers… Read More

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When Invaluable Kills Business

When Invaluable Kills Business
by Frederic Leens on 12-11-2017 at 7:00 am
Categories: EDA, FPGA
6 Comments

Productivity is notoriously hard to sell. I recently visited a company where the engineering team wanted to evaluate one of our FPGA debug and analysis products on an existing board. This board had an FPGA that we supported and had all the required connectivity – it could just be used ‘out of the box’. Our tool – Exostiv… Read More

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High Calibre Development Keeps Mentor on Top of the Game

High Calibre Development Keeps Mentor on Top of the Game
by Tom Simon on 12-07-2017 at 12:00 pm
Categories: EDA, FinFET, Siemens EDA

One might be tempted to think that technology driven gains in computer performance might be enough to keep up with the needs of design and verification tools. We know that design complexity is increasing at a rate predicted by Moore’s Law. We also know that the performance of the computers used during IC development benefit from … Read More

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Optimizing Return from your IP Portfolio

Optimizing Return from your IP Portfolio
by Bernard Murphy on 12-07-2017 at 7:00 am
Categories: Automotive, Consensia, EDA

Given that SoC design today is predicated on IP reuse, you would assume that processes to deliver, maintain and communicate status on reusable IP should be highly optimized. But that’s not necessarily the case, especially when so many design companies have consolidated, each brings its own IP libraries, design flows, license… Read More

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Blurring Boundaries

Blurring Boundaries
by Bernard Murphy on 12-05-2017 at 7:00 am
Categories: Cadence, EDA, Prototyping

I think most of us have come to terms with the need for multiple verification platforms, from virtual prototyping, through static and formal verification, to simulation, emulation and FPGA-based prototyping. The verification problem space is simply too big, in size certainly but also in dynamic range, to be effectively addressed… Read More

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35 Semiconductor IP Companies Hold 2nd Annual Conference

35 Semiconductor IP Companies Hold 2nd Annual Conference
by Daniel Payne on 12-04-2017 at 12:00 pm
Categories: EDA, Events

Our smart phone driven semiconductor economy consumes a lot of IP blocks to enable quick product development cycles, often annually updating with new models to choose from. So where do you find all of the best semiconductor IP, verification IP and embedded software? Well, one place is at the 2nd annual REUSE conference, scheduled… Read More