On July 9, 2025, a DACtv session with Zackary Glazewski of ChipAgents AI introduced Waveform Agents, an AI-driven solution by Chip Agents designed to tackle the complex challenge of waveform debugging in semiconductor design. The speaker highlighted the difficulties of traditional waveform debugging and demonstrated how… Read More
Electronic Design Automation
AI-Driven Verification: Transforming Semiconductor Design
In a DACtv session on July 9, 2025, Abhi Kolpekwar, Vice-President & General Manager at Siemens EDA, illuminated the transformative role of artificial intelligence (AI) in addressing the escalating challenges of semiconductor design verification. The presentation underscored the limitations of traditional methods… Read More
Building Trust in AI-Generated Code for Semiconductor Design
On July 9, 2025, a compelling session at DACtv by Vishal Moondrha of Perfroce addressed a critical challenge in the semiconductor industry: building trust in AI-generated code. The speaker highlighted the unique hurdles of integrating generative AI into semiconductor design, emphasizing issues like data provenance, quality,… Read More
Microsoft Discovery Platform: Revolutionizing Chip Design and Scientific Research
At a recent conference session on July 9, 2025, Prashant Varshney, head of the Silicon and Physics Industry Vertical for Microsoft’s Discovery and Quantum Division, unveiled the transformative potential of the Microsoft Discovery Platform. This innovative platform, announced at Microsoft’s Build event, aims to redefine… Read More
cHBM for AI: Capabilities, Challenges, and Opportunities
AI’s exponential growth is transforming semiconductor design—and memory is now as critical as compute. Multi-die architecture has emerged as the new frontier, and custom High Bandwidth Memory (cHBM) is fast becoming a cornerstone in this evolution. In a panel session at the Synopsys Executive Forum, leaders from AWS, Marvell,… Read More
Prompt Engineering for Security: Innovation in Verification
We have a shortage of reference designs to test detection of security vulnerabilities. An LLM-based method demonstrates how to fix that problem with structured prompt engineering. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford,… Read More
Calibre Vision AI at #62DAC
Calibre is a well-known EDA tool from Siemens that is used for physical verification, but I didn’t really know how AI technology was being used, so I attended a Tuesday session at #62DAC to get up to speed. Priyank Jain, Calibre Product Management presented slides and finished up with a Q&A session.
In the semiconductor world… Read More
Enabling the Ecosystem for True Heterogeneous 3D IC Designs
The demand for higher performance, greater configurability, and more cost-effective solutions is pushing the industry toward heterogeneous integration and 3D integrated circuits (3D ICs). These solutions are no longer reserved for niche applications—they are rapidly becoming essential to mainstream semiconductor design.… Read More
Podcast EP299: The Current and Future Capabilities of Static Verification at Synopsys with Rimpy Chugh
Dan is joined by Rimpy Chugh, a Principal Product Manager at Synopsys with 14 years of varied experience in EDA and functional verification. Prior to joining Synopsys, Rimpy held field applications and verification engineering positions at Mentor Graphics, Cadence and HCL Technologies.
Dan explores the expanding role of static… Read More
Griffin Securities’ Jay Vleeschhouwer on EDA Acquisitions and Startups
Jay Vleeschhouwer, Managing Director of Software Research at Griffin Securities, is a noted financial analyst who does a yearly presentation on the State of EDA during the Design Automation Conference (DAC). This year was no exception. He and I spent a memorable afternoon discussing the Synopsys-Ansys merger and startups. … Read More


Quantum Computing Technologies and Challenges