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EDA Flows for 3D Die Integration

EDA Flows for 3D Die Integration
by Tom Dillinger on 07-20-2021 at 6:00 am

future integration

Background

The emergence of 2.5D heterogeneous die integration using a silicon (or organic) interposer has enabled unique system architectures.  The term “More than Moore” has been used to describe the circuit density and cost advantages of leveraging multiple die in the package, the die potentially in different process technologies. … Read More


Cadence Tensilica FloatingPoint DSPs

Cadence Tensilica FloatingPoint DSPs
by Kalar Rajendiran on 07-15-2021 at 10:00 am

Tensilica FP DSPs

Being engrossed in the digital information world, it is easy to forget that the real world is comprised of mostly analog signals and data. Digital Signal Processors (DSP) take digitized forms of these worldly signals and manipulate them mathematically. Although floating-point is a more relevant and accurate way of representing… Read More


Fully Modeling the Semiconductor Manufacturing Process

Fully Modeling the Semiconductor Manufacturing Process
by Tom Simon on 07-14-2021 at 10:00 am

Modeling the Semiconductor Manufacturing Process

A lot of folks in the semiconductor business are familiar with Dassault Systèmes because of their product life cycle management (PLM) products for IC design. They are, of course well known in other industries as well for their 3D modeling and simulation software. Over the years they have added capabilities and intelligence to … Read More


StarFive Surpasses Development Goal with the Prodigy Rapid Prototyping System from S2C

StarFive Surpasses Development Goal with the Prodigy Rapid Prototyping System from S2C
by rdgreen on 07-13-2021 at 10:00 am

SartFive

Faced with the challenge of developing a high-performance hardware platform with critical software components, what choices do companies have in rapidly moving their development forward with modest budgets and resources?

That was the challenge faced by StarFive Technology, a leading IP and semiconductor SoC platform solution… Read More


Obtaining Early Analog Block Area Estimates

Obtaining Early Analog Block Area Estimates
by Tom Simon on 07-13-2021 at 6:00 am

Animate Preview Area Estimation

I’ve written before about Pulsic’s Animate Preview software, which is extremely helpful in completing placement in analog blocks so that they are ready for routing. Analog design automation has always been a tough proposition, but Animate Preview looks like a promising tool, with practical benefits. Obtaining DRC clean placement… Read More


Automotive Safety Island: Test, Safety, Security, ISO 26262

Automotive Safety Island: Test, Safety, Security, ISO 26262
by Daniel Payne on 07-12-2021 at 10:00 am

functional safety

I first fell in love with electric vehicles back in 1978 as an Electrical Engineering student, studying at the University of Minnesota. What caught my fancy was a small advertisement listed in the back of Popular Mechanics magazine to build your own electric vehicle by replacing the gas engine of a Honda with an electric motor, so… Read More


CEO Interview: Harald Neubauer of MunEDA

CEO Interview: Harald Neubauer of MunEDA
by Daniel Nenni on 07-09-2021 at 6:00 am

Harald Neubauer CEO of MunEDA

It has been my pleasure to interview Harald Neubauer, CEO of MunEDA. A veteran of the EDA industry, Harald cofounded MunEDA in 2001.

What brought you to the EDA industry?

Well, I always wanted to found a tech startup and was developing and evaluating various business ideas together with my later cofounder Andreas. Soon after we got… Read More


The Design Lifecycle of an Electronics Interface

The Design Lifecycle of an Electronics Interface
by Kalar Rajendiran on 07-08-2021 at 6:00 am

Product Process Organizational Complexities

We live in a world run by electronics systems. With the exception of completely isolated systems, all others take inputs, process them and produce outputs. The value of a system is determined not only by how well it processes the inputs but also by how well it handles inputs and outputs. Handling in this context means, how much data… Read More


Driving PPA Optimization Across the Cubic Space of 3D IC Silicon Stacks

Driving PPA Optimization Across the Cubic Space of 3D IC Silicon Stacks
by Tom Simon on 07-06-2021 at 9:00 am

Improved PPA Using 3D IC

The move to true 3D IC, monolithic 3D SOC and 3D heterogeneous integration may require one of the most major design tool architecture overhauls since IC design tools were first developed. While we have been taking steps toward 3DIC with 2.5D designs with interposers, HBM, etc., the fundamental tools and flows remain intact in many… Read More


The Quest for Bugs: “Correct by Design!”

The Quest for Bugs: “Correct by Design!”
by Bryan Dickman on 07-04-2021 at 6:00 am

Title Image

In this article we take an objective view of Virtual Prototyping from the engineering lens and the “quest to find bugs”. In this instance we discuss the avoidance of bugs in terms of architecting complex ASICs to be “correct by design”.

AI Challenges

It is not surprising to find out that other areas of human endeavour, beyond semiconductor… Read More