DAC2025 SemiWiki 800x100
WP_Term Object
(
    [term_id] => 19172
    [name] => Chiplet
    [slug] => chiplet
    [term_group] => 0
    [term_taxonomy_id] => 19172
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 146
    [filter] => raw
    [cat_ID] => 19172
    [category_count] => 146
    [category_description] => 
    [cat_name] => Chiplet
    [category_nicename] => chiplet
    [category_parent] => 0
    [is_post] => 
)

Embracing the Chiplet Journey: The Shift to Chiplet-Based Architectures

Embracing the Chiplet Journey: The Shift to Chiplet-Based Architectures
by Kalar Rajendiran on 02-12-2025 at 6:00 am

Chiplets A New Abstraction Layer

The semiconductor industry is facing a paradigm shift. Traditional scaling, once driven by Moore’s Law, is slowing down. For years, moving to smaller process nodes led to lower transistor costs and better performance. However, scaling from node to node now offers fewer benefits as wafer costs rise much more than the historical… Read More


Chiplets-Based Systems: Keysight’s Role in Design, Testing, and Data Management

Chiplets-Based Systems: Keysight’s Role in Design, Testing, and Data Management
by Kalar Rajendiran on 02-11-2025 at 6:00 am

Voltage Transfer Function Crrosstalk Limit

Keysight, with deep roots tracing back to Hewlett-Packard, has long been at the forefront of innovation in electronic design and testing. It manufactures electronics test and measurement equipment and software. The company also owns its own foundry and makes custom chips and packages for its instrumentation business. Many… Read More


Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?

Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?
by Kalar Rajendiran on 01-28-2025 at 6:00 am

Synopsys Predictions for Multi Die Designs in 2025

Predictions in technology adoption often hinge on a delicate balance between technical feasibility and market dynamics. While business considerations play a pivotal role, the technical category reasons for the success or failure of a prediction are more tangible and often easier to identify—if scrutinized with care. However,… Read More


ML and Multiphysics Corral 3D and HBM

ML and Multiphysics Corral 3D and HBM
by Bernard Murphy on 01-07-2025 at 6:00 am

multidie and HBM stacks min

3D design with high-bandwidth memory stacks (HBM) has become essential for leading edge semiconductor systems in multiple applications. Hyperscalers depend on large AI accelerator cores supported by 100GB or more of in-package HBM to handle trillion parameter AI models. Autonomous Drive (AD) vehicles may handle smaller … Read More


Accelerating Automotive SoC Design with Chiplets

Accelerating Automotive SoC Design with Chiplets
by Kalar Rajendiran on 01-02-2025 at 10:00 am

System Chiplet

The automotive industry is evolving rapidly with the increasing demand for intelligent, connected, and autonomous vehicles. Central to this transformation are System-on-Chip (SoC) designs, which integrate multiple processing units into a single chip for managing everything from safety systems to in-car entertainment.… Read More


Scaling AI Data Centers: The Role of Chiplets and Connectivity

Scaling AI Data Centers: The Role of Chiplets and Connectivity
by Kalar Rajendiran on 11-26-2024 at 6:00 am

Building the Modern Data Centre AI Compute Nodes

Artificial intelligence (AI) has revolutionized data center infrastructure, requiring a reimagining of computational, memory, and connectivity technologies. Meeting the increasing demand for high performance and efficiency in AI workloads has led to the emergence of innovative solutions, including chiplets, advanced… Read More


Defect-Pattern Leveraged Inherent Fingerprinting of Advanced IC Package with TRI

Defect-Pattern Leveraged Inherent Fingerprinting of Advanced IC Package with TRI
by Navid Asadizanjani on 10-29-2024 at 10:00 am

Article 1 figure 1 (1)

In the quest to secure the authenticity and ownership of advanced integrated circuit (IC) packages, a novel approach has been introduced in this paper that capitalizes on the inherent physical discrepancies within these components. This method, distinct from traditional strategies like physical unclonable functions (PUFs)… Read More


How AI is Redefining Data Center Infrastructure: Key Innovations for the Future

How AI is Redefining Data Center Infrastructure: Key Innovations for the Future
by Kalar Rajendiran on 10-10-2024 at 10:00 am

Connectivity Demands for AI Alphawave Semi

Artificial intelligence (AI) is driving a transformation in data center infrastructure, necessitating cutting-edge technologies to meet the growing demands of AI workloads. As AI systems scale up and out, next-gen compute servers, switches, optical-electrical links, and flexible, redundant networking solutions are … Read More


Maximizing 3DIC Design Productivity with 3DBlox: A Look at TSMC’s Progress and Innovations in 2024

Maximizing 3DIC Design Productivity with 3DBlox: A Look at TSMC’s Progress and Innovations in 2024
by Kalar Rajendiran on 10-08-2024 at 10:00 am

3DFabric Silicon Validated Thermal Analysis

At the 2024 TSMC OIP Ecosystem Forum, one of the technical talks by TSMC focused on maximizing 3DIC design productivity and rightfully so. With rapid advancements in semiconductor technology, 3DICs have become the next frontier in improving chip performance, energy efficiency, and density. TSMC’s focus on streamlining the… Read More


Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design

Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
by Kalar Rajendiran on 10-02-2024 at 10:00 am

OIP 2024 Synopsys TSMC

Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More