Sequential Equivalence Checking with Jasper

Sequential Equivalence Checking with Jasper
by Paul McLellan on 10-01-2013 at 6:15 pm

When new restaurants open they sometimes have what is called a ‘soft opening’ where they open a few days earlier than the official opening night. They are less busy since nobody knows they are open yet, maybe the whole menu isn’t available and expectations may be lower. Of course, Broadway productions also often… Read More


TSMC Open Innovation Platform Forum, October 1st

TSMC Open Innovation Platform Forum, October 1st
by Paul McLellan on 09-28-2013 at 5:00 am

One of TSMC’s two big Silicon Valley events each year is the Open Innovation Platform (OIP) Forum. This year it is on Tuesday October 1st. It is in the San Jose Convention Center and starts at 9am (registration opens at 8am). Pre-registration to attend is now open here or click on the image to the right.

From 9.10 to 9.40 is the … Read More


Dan Niles: Tapering and the Global Economy

Dan Niles: Tapering and the Global Economy
by Paul McLellan on 09-25-2013 at 5:21 pm

Yesterday was Dan Niles quarterly review that he does for GSA. As always he starts from the big picture of the world economy and works his way to a semiconductor forecast. The focus of this quarter was whether the world economy is strong enough for the US to “taper” and reduce the amount of quantitative easing (aka flooding… Read More


Hybrid Memory Cube Shipping

Hybrid Memory Cube Shipping
by Paul McLellan on 09-25-2013 at 4:37 pm

Today Micron announced that it is shipping 2GB Hybrid Memory Cube (HMC) samples. The HMC is actually 5 stacked die connected with through-silicon-vias (TSVs). The bottom die is a logic chip and is actually manufactured for Micron in an IBM 32nm process (and doesn’t have any TSVs). The other 4 die are 4Gb DRAM die manufactured… Read More


Dassault’s Simulation Lifecycle Management

Dassault’s Simulation Lifecycle Management
by Paul McLellan on 09-21-2013 at 4:29 pm

The first thing to realize about Dassault’s Simulation Lifecycle Management platform is that in the non-IC world where Dassault primarily operates, simulation doesn’t just mean functional verification or running Spice. It is anything during the design that produces analytical data. All of that data is important… Read More


Designing Power Management ICs

Designing Power Management ICs
by Paul McLellan on 09-20-2013 at 5:49 pm

With all the focus in design on SoCs in the latest sexy process (Hi-K Metal Gate! FinFETs!) it is easy to forget all the other chips that go into a system. When we say “system on a chip” there are actually very few systems that really get everything onto a single chip. One of the big areas that usually cannot go on the latest… Read More


Using OTP Memories To Keep SoC Power Down

Using OTP Memories To Keep SoC Power Down
by Paul McLellan on 09-20-2013 at 1:43 pm

Virtually all SoCs require one-time programmable (OTP) memory. Each SoC is different, of course, but two main uses are large memories for holding boot and programming code and small memories for holding encryption keys and trimming parameters, such as radio tuning information and so on.

There are alternatives to putting an OTP… Read More


A Brief History of TSMC’s OIP part 2

A Brief History of TSMC’s OIP part 2
by Paul McLellan on 09-18-2013 at 11:00 pm

The existence of TSMC’s Open Innovation Platform (OIP) program further sped up disaggregation of the semiconductor supply chain. Partly, this was enabled by the existence of a healthy EDA industry and an increasingly healthy IP industry. As chip designs had grown more complex and entered the system-on-chip (SoC) era, the amount… Read More


How Do You Do Computational Photography at HD Video Rates?

How Do You Do Computational Photography at HD Video Rates?
by Paul McLellan on 09-18-2013 at 2:22 pm

Increasingly, a GPU is misnamed as a “graphics” processing unit. They are really specialized architecture highly parallel compute engines. You can use these compute engines for graphics, of course, but people are inventive and find ways of using GPUs for other tasks that can take advantage of the highly parallel… Read More


Mentor Teaches Us About the Higg’s Boson

Mentor Teaches Us About the Higg’s Boson
by Paul McLellan on 09-17-2013 at 4:46 pm

Once a year Mentor has a customer appreciation event in Silicon Valley with a guest speaker on some aspect of science. This is silicon valley, after all, so we all have to be geeks. This year it was Dr Sean Carroll from CalTech on The Particle at the End of the Universe, the Hunt for The Higg’s Boson and What’s Next.

Wally … Read More