At CDNLive, Bob Mullen of TSMC gave a presentation on their new custom FinFET flow, doing design, and verifying designs. At 16nm there are all sorts of relatively new verification problems such as layout dependent effects (LDE) and voltage dependent design rules. We had some of this at 20nm but like most things in semiconductor,… Read More
Author: Paul McLellan
EDAC Mixer: Sonoma Chicken Coop
Get together with your fellow industry peers and insiders at the monthly EDAC Mixer, to the benefit of local charities. You don’t need to donate anything, you just show up and pay for your own drinks. A portion of the proceeds will go to local charities, this month to the Resource Area for Teaching (RAFT), a San Jose based non-profit… Read More
Sebastian Thrun: Self-driving cars, MOOCs, Google Glass and more
Sebastian Thrun gave a fascinating keynote at SNUG last week. It didn’t have that much to do with IC design but he discussed 3 projects that he had been involved with. Anyone would be happy to have just one of these projects on their resume but he has all these (and more).
The first is the Google self-driving car. This project actually… Read More
Jasper Announces Sequential Equivalence Checking
Jasper finally announced their sequential equivalence checking app this morning. I say finally because they haven’t really tried to keep it a secret. They talked about it at the end of last year the Jasper User Group meeting and it has even had a page on their website. But formally the product was announced today.
The new JasperGold… Read More
Undo Your Code
When I was a Virtutech a few years ago we had a product called Hindsight. It looked close to magic when you used it since it allowed you to run code backwards. I assume that the technology is still lurking under the hood in Wind River’s Simics product, now part of Intel. The way the code worked is that as the software executed, Simics… Read More
SNUG and IC Compiler II
I have been at SNUG for the last couple of days. The big announcement is IC Compiler II. It was a big part of Aart’s keynote and Monday lunch featured all the lead customers talking about their experience with the tool.
The big motivation for IC Compiler II was to create a fully multi-threaded physical design tool that will scale… Read More
Top 10 Reasons to Use Vivado Design Suite
Here are the top 10 reasons to use the Xilinx Vivado Design Suite to design your All Programmable Devices:
Reason number 10: Accelerate verification by over 100XThe Vivado Design Suite System Edition lets you do design at the C, C++ or systemC level. But a side-benefit is that you can use these languages for verification at performances… Read More
DAC: Automotive, IP and Security
DAC is in the first week of June in San Francisco as I’m sure you already know if you are reading this. Historically DAC has focused on electronic design automation (EDA) and embedded software and systems (ESS). This year there are three new areas: automotive, Intellectual Property (IP) and security.
Automotive
Ever increasing… Read More
SEMI Breakfast Forums: the Internet of Things
Coming up on April 10th is the SEMI Silicon Valley Breakfast Forum Internet of Things—Driving the Microelectronics Revolution. It runs from 7am to 10.45am and will be held at SEMI Headquarters which is at 3081 Zanker Road in San Jose.
Widespread adoption of the Internet of Things will take time, but the movement is advancing thanks… Read More
ARM, Cadence and the Internet of Things
There is clearly a lot of hype about the Internet of Things (IoT) right now, but also it is clear that it will be a real market. In fact, it already is with various medical, fitness and home-appliance products already available. At CES in January, wearables was probably the biggest trend. That doesn’t always pan out (3D TV was… Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside