When contemplating the Lego-like hardware and software structure of a leading system-on-chip (SoC) design, a mathematically inclined mind might marvel at the tantalizing array of combinatorial possibilities among its hardware and software components. In contrast, the engineering team tasked with its validation may have… Read More
Author: Lauro Rizzatti
SystemReady Certified: Ensuring Effortless Out-of-the-Box Arm Processor Deployments
The Immensity of Software Development and the Challenges of Debugging Series (Part 4 of 4)
The Impact of AI on Software and Hardware Development
Part 4 of this series analyzes how AI algorithmic processing is transforming software structures and significantly modifying processing hardware. It explores the marginalization of the traditional CPU architecture and demonstrates how software is increasingly dominating… Read More
The Immensity of Software Development and the Challenges of Debugging (Part 3 of 4)
Part 3 of this 4-part series analyzes methods and tools involved in debugging software at different layers of the software stack.
Software debugging involves identifying and resolving issues ranging from functional misbehaviors to crashes. The essential requirement for validating software programs is the ability to monitor… Read More
The Immensity of Software Development and the Challenges of Debugging Series (Part 2 of 4)
Part 2 of this 4-part series reviews the role of virtual prototypes as stand-alone tools and their use in hybrid emulation for early software validation, a practice known as the “shift-left” methodology. It assesses the differences among these approaches, focusing on their pros and cons.
The Immensity of Software Development the Challenges of Debugging (Part 1 of 4)
Part 1 of this 4-part series introduces the complexities of developing and bringing up the entire software stack on a System on Chip (SoC) or Multi-die system. It explores various approaches to deployment, highlighting their specific objectives and the unique challenges they address.
Introduction
As the saying goes, it’s… Read More
Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification
Prologue
Peter was running late for two reasons. First, he encountered unexpected heavy traffic and arrived ten minutes late for a crucial meeting with a customer to run a compliance test of his new 6G phone design prototyped on FPGAs. This prototype’s success was pivotal, as it could secure a significant purchase order.… Read More
SoC Power Islands Verification with Hardware-assisted Verification
The ever-growing demand for longer battery life in mobile devices and energy savings in general have pushed power optimization to the top of designers’ concerns. While various techniques like multi-VT transistors and clock gating offer power savings at gate-level design, the real impact occurs at system level, where hardware… Read More
Early SoC Dynamic Power Analysis Needs Hardware Emulation
The relentless pursuit for maximizing performance in semiconductor development is now matched by the crucial need to minimize energy consumption.
Traditional simulation-based power analysis methods face insurmountable challenges to accurately capture complex designs activities in real-world scenarios. As the scale… Read More
Luc Burgun: EDA CEO, Now French Startup Investor
When we last saw Luc Burgun’s name in the semiconductor industry, he was CEO and co-founder of EVE (Emulation and Verification Engineering), creator of the ZeBu (Zero Bugs) hardware emulator. EVE was acquired by Synopsys in 2012.
After the acquisition, Luc moved out of EDA and became an investor. Join me as I catch up with Luc and … Read More
Long-standing Roadblock to Viable L4/L5 Autonomous Driving and Generative AI Inference at the Edge
Two recent software-based algorithmic technologies –– autonomous driving (ADAS/AD) and generative AI (GenAI) –– are keeping the semiconductor engineering community up at night.
While ADAS at Level 2 and Level 3 are on track, AD at Levels 4 and 5 are far from reality, causing a drop in venture capital enthusiasm and money. Today,… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot