Discussions of chiplets has been on the rise, ever since the slowdown of Moore’s law benefits. Gartner Research projects semiconductor revenue from systems using chiplets to grow from $3.3 billion in 2020, to $50.5 billion in 2024. With any market opportunity, there are always challenges to overcome in order to realize the full… Read More
Author: Kalar Rajendiran
CEVA Fortrix™ SecureD2D IP: Securing Communications between Heterogeneous Chiplets
S2C’s FPGA Prototyping Solutions
Prototyping solutions have been in the news a lot lately. And FPGA-based prototyping approach is pretty widely used. On a panel session at DAC 2021, Amir Salek, Head of Silicon for Cloud and Infrastructure at Google had the following to say. Prototyping FPGA is a tremendous platform for testing and validation. We are doubling down… Read More
Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators
Using the right tool for the job can be extremely important. Well, maybe not in the case of the famed chef Martin Yan who is notorious for using just one knife—a razor sharp wide blade cleaver that doubles as a spatula—for preparing anything and everything he cooks. For the rest of us, though, the right tools can make all the difference.… Read More
Future of Semiconductor Design: 2022 Predictions and Trends
Predictions and trends create the forces that accelerate innovations and keep the industry moving forward. We are all used to hearing of important issues and challenges, usually in the context of solutions offered by various vendors. The SemiWiki forum plays its role in bringing awareness of all of the above to its audience. For… Read More
A 2021 Summary of OpenFive
Building a better mousetrap plays a key role in achieving market success in any industry. Of course, building one requires differentiating the product from the others already in the market. A differentiated product can even lead to creating demand for new products in adjacent markets. All of this is great but how do you implement… Read More
Upcoming Webinar: 3DIC Design from Concept to Silicon
Multi-die design is not a new concept. It has been around for a long time and has evolved from 2D level integration on to 2.5D and then to full 3D level implementations. Multiple driving forces have led to this progression. Whether the forces are driven by market needs, product needs, manufacturing technology availability or EDA… Read More
How System Companies are Re-shaping the Requirements for EDA
As the oldest and largest EDA conference, the Design Automation Conference (DAC) brings the best minds together to present, discuss, showcase and debate the latest and greatest advances in EDA. It accomplishes this in the form of technical papers, talks, company booths, product pavilions and panel discussions.
A key aspect … Read More
Embedded Logic-NVM Solutions for Al Chips
Last month, eMemory Technology hosted a webinar titled “eMemory’s Embedded Logic-NVM Solution for AI Chips.” While the purpose was to present their embedded Logic-NVM solution, the webinar nicely sets the stage by highlighting Analog NVM’s value as it relates to neural networks. Of course, the algorithms of neural networks… Read More
Cliosoft and Microsoft to Collaborate on the RAMP Program
We have all heard of many advanced technological inventions and products from the defense sector that subsequently got commercialized. While most of the Defense Advanced Research Projects Agency (DARPA) projects are classified secrets, many military innovations have had great influence in the commercial sector in the fields… Read More
A User View of Efabless Platform: Interview with Matt Venn
A few months ago, SemiWiki published an interview of Mike Wishart, CEO of Efabless. That interview provided insights into Efabless vision and its platform strategy. If you haven’t already read that post, please refer to it for background details. In essence, Efabless is about democratization of chip design and manufacturing.… Read More
LRCX- Mediocre, flattish, long, U shaped bottom- No recovery in sight yet-2025?